From: Alexander Graf <agraf@suse.de>
To: qemu-ppc@nongnu.org
Cc: peter.maydell@linaro.org, qemu-devel@nongnu.org,
Tom Musta <tommusta@gmail.com>
Subject: [Qemu-devel] [PULL 09/37] target-ppc: Fully Migrate to gen_set_cr1_from_fpscr
Date: Wed, 7 Jan 2015 16:20:20 +0100 [thread overview]
Message-ID: <1420644048-16919-10-git-send-email-agraf@suse.de> (raw)
In-Reply-To: <1420644048-16919-1-git-send-email-agraf@suse.de>
From: Tom Musta <tommusta@gmail.com>
Eliminate the set_rc argument from the gen_compute_fprf utility and
the corresponding (and incorrect) implementation. Replace it with
calls to the gen_set_cr1_from_fpscr() utility.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
---
target-ppc/translate.c | 55 ++++++++++++++++++++++++++++++--------------------
1 file changed, 33 insertions(+), 22 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 32c9f49..18cd8c4 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -250,7 +250,7 @@ static inline void gen_reset_fpstatus(void)
gen_helper_reset_fpstatus(cpu_env);
}
-static inline void gen_compute_fprf(TCGv_i64 arg, int set_fprf, int set_rc)
+static inline void gen_compute_fprf(TCGv_i64 arg, int set_fprf)
{
TCGv_i32 t0 = tcg_temp_new_i32();
@@ -258,15 +258,7 @@ static inline void gen_compute_fprf(TCGv_i64 arg, int set_fprf, int set_rc)
/* This case might be optimized later */
tcg_gen_movi_i32(t0, 1);
gen_helper_compute_fprf(t0, cpu_env, arg, t0);
- if (unlikely(set_rc)) {
- tcg_gen_mov_i32(cpu_crf[1], t0);
- }
gen_helper_float_check_status(cpu_env);
- } else if (unlikely(set_rc)) {
- /* We always need to compute fpcc */
- tcg_gen_movi_i32(t0, 0);
- gen_helper_compute_fprf(t0, cpu_env, arg, t0);
- tcg_gen_mov_i32(cpu_crf[1], t0);
}
tcg_temp_free_i32(t0);
@@ -2110,8 +2102,10 @@ static void gen_f##name(DisasContext *ctx) \
gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env, \
cpu_fpr[rD(ctx->opcode)]); \
} \
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], set_fprf, \
- Rc(ctx->opcode) != 0); \
+ gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], set_fprf); \
+ if (unlikely(Rc(ctx->opcode) != 0)) { \
+ gen_set_cr1_from_fpscr(ctx); \
+ } \
}
#define GEN_FLOAT_ACB(name, op2, set_fprf, type) \
@@ -2135,8 +2129,10 @@ static void gen_f##name(DisasContext *ctx) \
gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env, \
cpu_fpr[rD(ctx->opcode)]); \
} \
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], \
- set_fprf, Rc(ctx->opcode) != 0); \
+ gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], set_fprf); \
+ if (unlikely(Rc(ctx->opcode) != 0)) { \
+ gen_set_cr1_from_fpscr(ctx); \
+ } \
}
#define GEN_FLOAT_AB(name, op2, inval, set_fprf, type) \
_GEN_FLOAT_AB(name, name, 0x3F, op2, inval, 0, set_fprf, type); \
@@ -2159,8 +2155,10 @@ static void gen_f##name(DisasContext *ctx) \
gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env, \
cpu_fpr[rD(ctx->opcode)]); \
} \
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], \
- set_fprf, Rc(ctx->opcode) != 0); \
+ gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], set_fprf); \
+ if (unlikely(Rc(ctx->opcode) != 0)) { \
+ gen_set_cr1_from_fpscr(ctx); \
+ } \
}
#define GEN_FLOAT_AC(name, op2, inval, set_fprf, type) \
_GEN_FLOAT_AC(name, name, 0x3F, op2, inval, 0, set_fprf, type); \
@@ -2178,8 +2176,10 @@ static void gen_f##name(DisasContext *ctx) \
gen_reset_fpstatus(); \
gen_helper_f##name(cpu_fpr[rD(ctx->opcode)], cpu_env, \
cpu_fpr[rB(ctx->opcode)]); \
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], \
- set_fprf, Rc(ctx->opcode) != 0); \
+ gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], set_fprf); \
+ if (unlikely(Rc(ctx->opcode) != 0)) { \
+ gen_set_cr1_from_fpscr(ctx); \
+ } \
}
#define GEN_FLOAT_BS(name, op1, op2, set_fprf, type) \
@@ -2194,8 +2194,10 @@ static void gen_f##name(DisasContext *ctx) \
gen_reset_fpstatus(); \
gen_helper_f##name(cpu_fpr[rD(ctx->opcode)], cpu_env, \
cpu_fpr[rB(ctx->opcode)]); \
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], \
- set_fprf, Rc(ctx->opcode) != 0); \
+ gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], set_fprf); \
+ if (unlikely(Rc(ctx->opcode) != 0)) { \
+ gen_set_cr1_from_fpscr(ctx); \
+ } \
}
/* fadd - fadds */
@@ -2228,7 +2230,10 @@ static void gen_frsqrtes(DisasContext *ctx)
cpu_fpr[rB(ctx->opcode)]);
gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env,
cpu_fpr[rD(ctx->opcode)]);
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], 1, Rc(ctx->opcode) != 0);
+ gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], 1);
+ if (unlikely(Rc(ctx->opcode) != 0)) {
+ gen_set_cr1_from_fpscr(ctx);
+ }
}
/* fsel */
@@ -2249,7 +2254,10 @@ static void gen_fsqrt(DisasContext *ctx)
gen_reset_fpstatus();
gen_helper_fsqrt(cpu_fpr[rD(ctx->opcode)], cpu_env,
cpu_fpr[rB(ctx->opcode)]);
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], 1, Rc(ctx->opcode) != 0);
+ gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], 1);
+ if (unlikely(Rc(ctx->opcode) != 0)) {
+ gen_set_cr1_from_fpscr(ctx);
+ }
}
static void gen_fsqrts(DisasContext *ctx)
@@ -2265,7 +2273,10 @@ static void gen_fsqrts(DisasContext *ctx)
cpu_fpr[rB(ctx->opcode)]);
gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env,
cpu_fpr[rD(ctx->opcode)]);
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], 1, Rc(ctx->opcode) != 0);
+ gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], 1);
+ if (unlikely(Rc(ctx->opcode) != 0)) {
+ gen_set_cr1_from_fpscr(ctx);
+ }
}
/*** Floating-Point multiply-and-add ***/
--
1.8.1.4
next prev parent reply other threads:[~2015-01-07 15:21 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-07 15:20 [Qemu-devel] [PULL 00/37] ppc patch queue 2015-01-07 Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 01/37] PPC: e500: Move CCSR definition to params Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 02/37] PPC: e500: Move CCSR and MMIO space to upper end of address space Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 03/37] PPC: mpc8554ds: Tell user about exceeding RAM limits Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 04/37] PPC: e500 pci host: Add support for ATMUs Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 05/37] target-ppc: Load/Store Vector Element Storage Alignment Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 06/37] target-ppc: VXSQRT Should Not Be Set for NaNs Alexander Graf
2015-02-12 22:21 ` Maciej W. Rozycki
2015-02-13 14:28 ` Tom Musta
2015-02-13 23:35 ` Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 07/37] target-ppc: Fix Floating Point Move Instructions That Set CR1 Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 08/37] target-ppc: mffs. Should Set CR1 from FPSCR Bits Alexander Graf
2015-01-07 15:20 ` Alexander Graf [this message]
2015-01-07 15:20 ` [Qemu-devel] [PULL 10/37] target-ppc: Eliminate set_fprf Argument From gen_compute_fprf Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 11/37] target-ppc: Eliminate set_fprf Argument From helper_compute_fprf Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 12/37] target-ppc: explicitly save page table headers in big endian Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 13/37] spapr: Fix stale HTAB during live migration (KVM) Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 14/37] spapr: Fix integer overflow during migration (TCG) Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 15/37] spapr: Fix stale HTAB during live " Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 16/37] device-tree: fix memory leak Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 17/37] ppc: do not use get_clock_realtime() Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 18/37] PPC: Fix crash on spapr_tce_table_finalize() Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 19/37] pseries: Update SLOF firmware image to 20141202 Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 20/37] target-ppc: Introduce Instruction Type for Transactional Memory Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 21/37] target-ppc: Introduce Feature Flag " Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 22/37] target-ppc: Introduce tm_enabled Bit to CPU State Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 23/37] target-ppc: Power8 Supports Transactional Memory Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 24/37] target-ppc: Introduce TEXASRU Bit Fields Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 25/37] target-ppc: Introduce tbegin Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 26/37] target-ppc: Introduce TM Noops Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 27/37] target-ppc: Introduce tcheck Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 28/37] target-ppc: Introduce Privileged TM Noops Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 29/37] PPC: e500: Fix GPIO controller interrupt number Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 30/37] target-ppc: Mark SR() and gen_sync_exception() as !CONFIG_USER_ONLY Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 31/37] target-ppc: Cast ssize_t to size_t before printing with %zx Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 32/37] hw/ppc: modified the condition for usb controllers to be created for some ppc machines Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 33/37] hw/machine: added machine_usb wrapper Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 34/37] hw/usb: simplified usb_enabled Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 35/37] hw/ppc/mac_newworld: QOMified mac99 machines Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 36/37] hw/ppc/spapr: simplify usb controller creation logic Alexander Graf
2015-01-07 15:20 ` [Qemu-devel] [PULL 37/37] hw/ppc/mac_newworld: " Alexander Graf
2015-01-10 21:02 ` [Qemu-devel] [PULL 00/37] ppc patch queue 2015-01-07 Peter Maydell
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