From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40003) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y8sPp-0005wD-Ps for qemu-devel@nongnu.org; Wed, 07 Jan 2015 10:21:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Y8sPk-0003Dc-7L for qemu-devel@nongnu.org; Wed, 07 Jan 2015 10:20:57 -0500 From: Alexander Graf Date: Wed, 7 Jan 2015 16:20:40 +0100 Message-Id: <1420644048-16919-30-git-send-email-agraf@suse.de> In-Reply-To: <1420644048-16919-1-git-send-email-agraf@suse.de> References: <1420644048-16919-1-git-send-email-agraf@suse.de> Subject: [Qemu-devel] [PULL 29/37] PPC: e500: Fix GPIO controller interrupt number List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org Cc: peter.maydell@linaro.org, Amit Singh Tomar , qemu-devel@nongnu.org From: Amit Tomar The GPIO controller lives at IRQ 47, not 43 on real hardware. This is a problem because IRQ 43 is occupied by the I2C controller which we want to implement next, so we'd have a conflict on that IRQ number. Move the GPIO controller to IRQ 47 where it belongs. Signed-off-by: Amit Singh Tomar Signed-off-by: Alexander Graf --- hw/ppc/e500.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index a2e60b4..7e17d18 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -60,7 +60,7 @@ #define MPC8544_PCI_REGS_SIZE 0x1000ULL #define MPC8544_UTIL_OFFSET 0xe0000ULL #define MPC8XXX_GPIO_OFFSET 0x000FF000ULL -#define MPC8XXX_GPIO_IRQ 43 +#define MPC8XXX_GPIO_IRQ 47 struct boot_info { -- 1.8.1.4