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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 03/10] tcg: Move emit of INDEX_op_end into gen_tb_end
Date: Fri,  9 Jan 2015 13:23:13 -0800	[thread overview]
Message-ID: <1420838600-22369-4-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1420838600-22369-1-git-send-email-rth@twiddle.net>

Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 include/exec/gen-icount.h     | 2 ++
 target-alpha/translate.c      | 2 +-
 target-arm/translate-a64.c    | 1 -
 target-arm/translate.c        | 1 -
 target-cris/translate.c       | 2 +-
 target-i386/translate.c       | 2 +-
 target-lm32/translate.c       | 2 +-
 target-m68k/translate.c       | 1 -
 target-microblaze/translate.c | 2 +-
 target-mips/translate.c       | 2 +-
 target-moxie/translate.c      | 2 +-
 target-openrisc/translate.c   | 2 +-
 target-ppc/translate.c        | 2 +-
 target-s390x/translate.c      | 2 +-
 target-sh4/translate.c        | 2 +-
 target-sparc/translate.c      | 2 +-
 target-tricore/translate.c    | 1 -
 target-unicore32/translate.c  | 1 -
 target-xtensa/translate.c     | 1 -
 19 files changed, 14 insertions(+), 18 deletions(-)

diff --git a/include/exec/gen-icount.h b/include/exec/gen-icount.h
index da53395..d5266ff 100644
--- a/include/exec/gen-icount.h
+++ b/include/exec/gen-icount.h
@@ -48,6 +48,8 @@ static void gen_tb_end(TranslationBlock *tb, int num_insns)
         gen_set_label(icount_label);
         tcg_gen_exit_tb((uintptr_t)tb + TB_EXIT_ICOUNT_EXPIRED);
     }
+
+    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
 }
 
 static inline void gen_io_start(void)
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 76658a0..bb85c2d 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -2912,7 +2912,7 @@ static inline void gen_intermediate_code_internal(AlphaCPU *cpu,
     }
 
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (search_pc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         lj++;
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 80d2c07..220ebba 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -11090,7 +11090,6 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
 
 done_generating:
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
 
 #ifdef DEBUG_DISAS
     if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
diff --git a/target-arm/translate.c b/target-arm/translate.c
index b52c758..e06fba0 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -11330,7 +11330,6 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu,
 
 done_generating:
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
 
 #ifdef DEBUG_DISAS
     if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 76406af..aa80dea 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3344,7 +3344,7 @@ gen_intermediate_code_internal(CRISCPU *cpu, TranslationBlock *tb,
         }
     }
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (search_pc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         lj++;
diff --git a/target-i386/translate.c b/target-i386/translate.c
index fc75da7..65b3f69 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -8066,7 +8066,7 @@ static inline void gen_intermediate_code_internal(X86CPU *cpu,
         gen_io_end();
 done_generating:
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     /* we don't forget to fill the last values */
     if (search_pc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index 8454e8b..482b8dd 100644
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -1158,7 +1158,7 @@ void gen_intermediate_code_internal(LM32CPU *cpu,
     }
 
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (search_pc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         lj++;
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index efd4cfc..2c396ef 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -3075,7 +3075,6 @@ gen_intermediate_code_internal(M68kCPU *cpu, TranslationBlock *tb,
         }
     }
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
 
 #ifdef DEBUG_DISAS
     if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index fd2b771..0e3d612 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1846,7 +1846,7 @@ gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb,
         }
     }
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (search_pc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         lj++;
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 1205909..8def7ec 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -19236,7 +19236,7 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb,
     }
 done_generating:
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (search_pc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         lj++;
diff --git a/target-moxie/translate.c b/target-moxie/translate.c
index 4541b9b..675c4d0 100644
--- a/target-moxie/translate.c
+++ b/target-moxie/translate.c
@@ -900,7 +900,7 @@ gen_intermediate_code_internal(MoxieCPU *cpu, TranslationBlock *tb,
     }
  done_generating:
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (search_pc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         lj++;
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index 407bd97..9dcc9ae 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -1759,7 +1759,7 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu,
     }
 
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (search_pc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         k++;
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index d381632..ae833d9 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -11449,7 +11449,7 @@ static inline void gen_intermediate_code_internal(PowerPCCPU *cpu,
         tcg_gen_exit_tb(0);
     }
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (unlikely(search_pc)) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         lj++;
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index dbf1993..661d110 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -4856,7 +4856,7 @@ static inline void gen_intermediate_code_internal(S390CPU *cpu,
     }
 
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (search_pc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         lj++;
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 3088edc..0550611 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -1962,7 +1962,7 @@ gen_intermediate_code_internal(SuperHCPU *cpu, TranslationBlock *tb,
     }
 
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (search_pc) {
         i = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         ii++;
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 78c4e21..fc239bd 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -5342,7 +5342,7 @@ static inline void gen_intermediate_code_internal(SPARCCPU *cpu,
         }
     }
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (spc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         lj++;
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index dbcf87e..78fe38b 100644
--- a/target-tricore/translate.c
+++ b/target-tricore/translate.c
@@ -5098,7 +5098,6 @@ gen_intermediate_code_internal(TriCoreCPU *cpu, struct TranslationBlock *tb,
     }
 
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
     if (search_pc) {
         printf("done_generating search pc\n");
     } else {
diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c
index 653c225..04ee3c2 100644
--- a/target-unicore32/translate.c
+++ b/target-unicore32/translate.c
@@ -2037,7 +2037,6 @@ static inline void gen_intermediate_code_internal(UniCore32CPU *cpu,
 
 done_generating:
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
 
 #ifdef DEBUG_DISAS
     if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index 6500554..e1f5ef2 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -3133,7 +3133,6 @@ void gen_intermediate_code_internal(XtensaCPU *cpu,
         gen_jumpi(&dc, dc.pc, 0);
     }
     gen_tb_end(tb, insn_count);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
 
 #ifdef DEBUG_DISAS
     if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
-- 
2.1.0

  parent reply	other threads:[~2015-01-09 21:24 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-09 21:23 [Qemu-devel] [PULL 00/10] Linked list for tcg ops Richard Henderson
2015-01-09 21:23 ` [Qemu-devel] [PULL 01/10] tcg: Move some opcode generation functions out of line Richard Henderson
2015-01-09 21:23 ` [Qemu-devel] [PULL 02/10] tcg: Reduce ifdefs in tcg-op.c Richard Henderson
2015-01-09 21:23 ` Richard Henderson [this message]
2015-01-09 21:23 ` [Qemu-devel] [PULL 04/10] tcg: Introduce tcg_op_buf_count and tcg_op_buf_full Richard Henderson
2015-01-09 21:23 ` [Qemu-devel] [PULL 05/10] tcg: Put opcodes in a linked list Richard Henderson
2015-01-12 19:47   ` Peter Maydell
2015-01-09 21:23 ` [Qemu-devel] [PULL 06/10] tcg: Remove opcodes instead of noping them out Richard Henderson
2015-01-09 21:23 ` [Qemu-devel] [PULL 07/10] tcg: Implement insert_op_before Richard Henderson
2015-01-09 21:23 ` [Qemu-devel] [PULL 08/10] tcg: Remove unused opcodes Richard Henderson
2015-01-09 21:23 ` [Qemu-devel] [PULL 09/10] tcg: Optimize muls2_i32 Richard Henderson
2015-01-09 21:23 ` [Qemu-devel] [PULL 10/10] tcg: Further optimizations for add2 and sub2_i32 Richard Henderson
2015-01-12 10:06 ` [Qemu-devel] [PULL 00/10] Linked list for tcg ops Peter Maydell
2015-01-12 10:09   ` Peter Maydell
2015-01-12 15:20     ` Richard Henderson
2015-01-12 19:48       ` Peter Maydell

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