From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50260) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YB3hh-00044n-Hw for qemu-devel@nongnu.org; Tue, 13 Jan 2015 10:48:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YB3hb-0003dg-Vg for qemu-devel@nongnu.org; Tue, 13 Jan 2015 10:48:25 -0500 Received: from mx1.redhat.com ([209.132.183.28]:45288) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YB3hb-0003cZ-Or for qemu-devel@nongnu.org; Tue, 13 Jan 2015 10:48:19 -0500 From: Andrew Jones Date: Tue, 13 Jan 2015 16:48:09 +0100 Message-Id: <1421164091-19989-1-git-send-email-drjones@redhat.com> Subject: [Qemu-devel] [PATCH 0/2] tcg-arm: fix and extend instruction execution control List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org We're currently assuming EL1 can execute code it shouldn't, and that EL0 shouldn't execute code it can. Fix those cases, and also extend instruction execution control to handle WXN and more. The first patch addresses EL0 faulting when it should be allowed to execute. The second patch addresses EL1 not faulting when it should, as well as adds in additional execution control. Andrew Jones (2): tcg-aarch64: user doesn't need R/W access to exec tcg-arm: more instruction execution control target-arm/helper.c | 103 ++++++++++++++++++++++++++++++++++++++++------------ 1 file changed, 80 insertions(+), 23 deletions(-) -- 1.9.3