From: Eric Auger <eric.auger@linaro.org>
To: eric.auger@st.com, christoffer.dall@linaro.org,
qemu-devel@nongnu.org, marc.zyngier@arm.com,
peter.maydell@linaro.org, pbonzini@redhat.com, afaerber@suse.de
Cc: patches@linaro.org, kvmarm@lists.cs.columbia.edu, eric.auger@linaro.org
Subject: [Qemu-devel] [RFC v2 1/2] linux-headers: update KVM headers from KVM_DEV_ARM_VGIC_GRP_CTRL
Date: Thu, 15 Jan 2015 13:05:10 +0000 [thread overview]
Message-ID: <1421327111-1563-2-git-send-email-eric.auger@linaro.org> (raw)
In-Reply-To: <1421327111-1563-1-git-send-email-eric.auger@linaro.org>
Add a new group/attribute in VGIC KVM device enabling to force
vgic init: KVM_DEV_ARM_VGIC_GRP_CTRL/KVM_DEV_ARM_VGIC_CTRL_INIT
Update according to headers found in
http://git.linaro.org/people/eric.auger/linux.git
branch irqfd_v6_integrated_official_release
Signed-off-by: Eric Auger <eric.auger@linaro.org>
---
| 5 +++++
| 5 +++++
2 files changed, 10 insertions(+)
--git a/linux-headers/asm-arm/kvm.h b/linux-headers/asm-arm/kvm.h
index 09ee408..2499867 100644
--- a/linux-headers/asm-arm/kvm.h
+++ b/linux-headers/asm-arm/kvm.h
@@ -175,6 +175,8 @@ struct kvm_arch_memory_slot {
#define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0
#define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT)
#define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3
+#define KVM_DEV_ARM_VGIC_GRP_CTRL 4
+#define KVM_DEV_ARM_VGIC_CTRL_INIT 0
/* KVM_IRQ_LINE irq field index values */
#define KVM_ARM_IRQ_TYPE_SHIFT 24
@@ -196,6 +198,9 @@ struct kvm_arch_memory_slot {
/* Highest supported SPI, from VGIC_NR_IRQS */
#define KVM_ARM_IRQ_GIC_MAX 127
+/* One single KVM irqchip, ie. the VGIC */
+#define KVM_NR_IRQCHIPS 1
+
/* PSCI interface */
#define KVM_PSCI_FN_BASE 0x95c1ba5e
#define KVM_PSCI_FN(n) (KVM_PSCI_FN_BASE + (n))
--git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h
index 8e38878..b35c95a 100644
--- a/linux-headers/asm-arm64/kvm.h
+++ b/linux-headers/asm-arm64/kvm.h
@@ -161,6 +161,8 @@ struct kvm_arch_memory_slot {
#define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0
#define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT)
#define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3
+#define KVM_DEV_ARM_VGIC_GRP_CTRL 4
+#define KVM_DEV_ARM_VGIC_CTRL_INIT 0
/* KVM_IRQ_LINE irq field index values */
#define KVM_ARM_IRQ_TYPE_SHIFT 24
@@ -182,6 +184,9 @@ struct kvm_arch_memory_slot {
/* Highest supported SPI, from VGIC_NR_IRQS */
#define KVM_ARM_IRQ_GIC_MAX 127
+/* One single KVM irqchip, ie. the VGIC */
+#define KVM_NR_IRQCHIPS 1
+
/* PSCI interface */
#define KVM_PSCI_FN_BASE 0x95c1ba5e
#define KVM_PSCI_FN(n) (KVM_PSCI_FN_BASE + (n))
--
1.8.3.2
next prev parent reply other threads:[~2015-01-15 13:05 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-15 13:05 [Qemu-devel] [RFC v2 0/2] explicit VGIC initialization in finalize function Eric Auger
2015-01-15 13:05 ` Eric Auger [this message]
2015-01-15 13:05 ` [Qemu-devel] [RFC v2 2/2] hw/intc/arm_gic: Initialize the vgic in the realize function Eric Auger
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