From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53511) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YDyna-0003Pj-EK for qemu-devel@nongnu.org; Wed, 21 Jan 2015 12:10:35 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YDynT-0007KL-K7 for qemu-devel@nongnu.org; Wed, 21 Jan 2015 12:10:34 -0500 Received: from mail.uni-paderborn.de ([131.234.142.9]:47276) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YDyhJ-00041r-EM for qemu-devel@nongnu.org; Wed, 21 Jan 2015 12:04:05 -0500 From: Bastian Koppelmann Date: Wed, 21 Jan 2015 18:04:45 +0000 Message-Id: <1421863489-7716-1-git-send-email-kbastian@mail.uni-paderborn.de> Subject: [Qemu-devel] [PATCH 0/4] TriCore add instructions of RR1, RR2, RRPW and RRR opcode format List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: rth@twiddle.net Hi, this is a rather short patchset, that only implements instructions of four formats. There will be another patchset, which has a few bugfixes. Cheers, Bastian Bastian Koppelmann (4): target-tricore: target-tricore: Add instructions of RR1 opcode format, that have 0x93 as first opcode target-tricore: Add instructions of RR2 opcode format target-tricore: Add instructions of RRPW opcode format target-tricore: Add instructions of RRR opcode format target-tricore/helper.h | 8 + target-tricore/op_helper.c | 169 +++++++++++++ target-tricore/translate.c | 526 +++++++++++++++++++++++++++++++++++++++ target-tricore/tricore-opcodes.h | 2 +- 4 files changed, 704 insertions(+), 1 deletion(-) -- 2.2.2