From: Marcel Apfelbaum <marcel@redhat.com>
To: qemu-devel@nongnu.org
Cc: seabios@seabios.org, kraxel@redhat.com, mst@redhat.com,
quintela@redhat.com, agraf@suse.de, alex.williamson@redhat.com,
kevin@koconnor.net, qemu-ppc@nongnu.org, hare@suse.de,
imammedo@redhat.com, amit.shah@redhat.com, pbonzini@redhat.com,
leon.alrae@imgtec.com, aurelien@aurel32.net, rth@twiddle.net
Subject: [Qemu-devel] [PATCH RFC 17/17] hw/acpi: hack - generate dummy region ranges for first acpi-build (will be removed from the series)
Date: Thu, 22 Jan 2015 21:52:43 +0200 [thread overview]
Message-ID: <1421956363-23502-18-git-send-email-marcel@redhat.com> (raw)
In-Reply-To: <1421956363-23502-1-git-send-email-marcel@redhat.com>
The SSDT size is different from the first time is created and
the second time because between them the BIOS sets ranges for
the other PCI root busses.
The OS-es cannot find the rsdt pointer after that, until this
problem is solved, this hack can be used for testing.
Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
---
hw/i386/acpi-build.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index d490a1e..c7ab178 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -794,6 +794,9 @@ static AcpiAml build_crs(PcPciInfo *pci, PciInfo *bus_info,
bridge_info->bus.io_range->limit -
bridge_info->bus.io_range->base + 1));
range = *bridge_info->bus.io_range;
+ if (!range.base) {
+ range.base = 0x0D00 + bus_info->bus * 0x100;
+ }
pci_mem_range_insert(io_ranges, range);
aml_append(&crs,
@@ -806,6 +809,9 @@ static AcpiAml build_crs(PcPciInfo *pci, PciInfo *bus_info,
bridge_info->bus.memory_range->limit -
bridge_info->bus.memory_range->base + 1));
range = *bridge_info->bus.memory_range;
+ if (!range.base) {
+ range.base = pci->w32.begin + bus_info->bus * 0x1000;
+ }
pci_mem_range_insert(mem_ranges, range);
aml_append(&crs,
acpi_dword_memory(acpi_pos_decode, acpi_min_fixed,
@@ -817,6 +823,9 @@ static AcpiAml build_crs(PcPciInfo *pci, PciInfo *bus_info,
bridge_info->bus.prefetchable_range->limit -
bridge_info->bus.prefetchable_range->base + 1));
range = *bridge_info->bus.prefetchable_range;
+ if (!range.base) {
+ range.base = pci->w32.begin + bus_info->bus * 0x2000;
+ }
pci_mem_range_insert(mem_ranges, range);
}
--
2.1.0
prev parent reply other threads:[~2015-01-22 19:54 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-22 19:52 [Qemu-devel] [PATCH RFC 00/17] implement multiple primary busses for pc machines Marcel Apfelbaum
2015-01-22 19:52 ` [Qemu-devel] [PATCH RFC 01/17] acpi: added needed acpi constructs Marcel Apfelbaum
2015-01-22 19:52 ` [Qemu-devel] [PATCH RFC 02/17] hw/acpi: add support for multiple root busses Marcel Apfelbaum
2015-01-22 19:52 ` [Qemu-devel] [PATCH RFC 03/17] hw/apci: add _PRT method for extra " Marcel Apfelbaum
2015-01-22 19:52 ` [Qemu-devel] [PATCH RFC 04/17] hw/acpi: add _CRS " Marcel Apfelbaum
2015-01-22 19:52 ` [Qemu-devel] [PATCH RFC 05/17] hw/acpi: remove from root bus 0 the crs resources used by other busses Marcel Apfelbaum
2015-01-22 19:52 ` [Qemu-devel] [PATCH RFC 06/17] hw/pci: move pci bus related code to separate files Marcel Apfelbaum
2015-01-22 19:52 ` [Qemu-devel] [PATCH RFC 07/17] hw/pci: made pci_bus_is_root a PCIBusClass method Marcel Apfelbaum
2015-01-22 19:52 ` [Qemu-devel] [PATCH RFC 08/17] hw/pci: made pci_bus_num " Marcel Apfelbaum
2015-01-22 19:52 ` [Qemu-devel] [PATCH RFC 09/17] hw/pci: introduce TYPE_PCI_MAIN_HOST_BRIDGE interface Marcel Apfelbaum
2015-01-22 19:52 ` [Qemu-devel] [PATCH RFC 10/17] hw/pci: removed 'rootbus nr is 0' assumption from qmp_pci_query Marcel Apfelbaum
2015-01-23 7:57 ` Michael S. Tsirkin
2015-01-23 8:28 ` Marcel Apfelbaum
2015-01-23 9:15 ` Michael S. Tsirkin
2015-01-22 19:52 ` [Qemu-devel] [PATCH RFC 11/17] hw/pci: implement iteration over multiple host bridges Marcel Apfelbaum
2015-01-22 19:52 ` [Qemu-devel] [PATCH RFC 12/17] hw/pci: introduce PCI Expander Bridge (PXB) Marcel Apfelbaum
2015-01-22 19:52 ` [Qemu-devel] [PATCH RFC 13/17] hw/pci: inform bios if the system has more than one pci bridge Marcel Apfelbaum
2015-01-22 19:52 ` [Qemu-devel] [PATCH RFC 14/17] hw/pci: piix - suport multiple host bridges Marcel Apfelbaum
2015-01-22 19:52 ` [Qemu-devel] [PATCH RFC 15/17] hw/pxb: add map_irq func Marcel Apfelbaum
2015-01-22 19:52 ` [Qemu-devel] [PATCH RFC 16/17] hw/pci-bridge: hack - disable shpc bar (will be removed from the series) Marcel Apfelbaum
2015-01-22 19:52 ` Marcel Apfelbaum [this message]
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