From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43774) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YENoa-0001DC-SI for qemu-devel@nongnu.org; Thu, 22 Jan 2015 14:53:20 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YENoZ-0007ux-Hm for qemu-devel@nongnu.org; Thu, 22 Jan 2015 14:53:16 -0500 From: Marcel Apfelbaum Date: Thu, 22 Jan 2015 21:52:28 +0200 Message-Id: <1421956363-23502-3-git-send-email-marcel@redhat.com> In-Reply-To: <1421956363-23502-1-git-send-email-marcel@redhat.com> References: <1421956363-23502-1-git-send-email-marcel@redhat.com> Subject: [Qemu-devel] [PATCH RFC 02/17] hw/acpi: add support for multiple root busses List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: seabios@seabios.org, kraxel@redhat.com, mst@redhat.com, quintela@redhat.com, agraf@suse.de, alex.williamson@redhat.com, kevin@koconnor.net, qemu-ppc@nongnu.org, hare@suse.de, imammedo@redhat.com, amit.shah@redhat.com, pbonzini@redhat.com, leon.alrae@imgtec.com, aurelien@aurel32.net, rth@twiddle.net If the machine has several root busses, we need to add them to acpi in order to be properly detected by guests. Signed-off-by: Marcel Apfelbaum --- hw/i386/acpi-build.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 5831450..9837120 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -60,6 +60,8 @@ #include "qom/qom-qobject.h" #include "exec/ram_addr.h" +#include "qmp-commands.h" + /* These are used to size the ACPI tables for -M pc-i440fx-1.7 and * -M pc-i440fx-2.0. Even if the actual amount of AML generated grows * a little bit, there should be plenty of free space since the DSDT @@ -661,6 +663,34 @@ build_ssdt(AcpiAml *table_aml, GArray *linker, ssdt = acpi_def_block("SSDT", 1, ACPI_BUILD_APPNAME6, ACPI_BUILD_APPNAME4, 1); + { + PciInfoList *info_list, *info; + Error *err = NULL; + + info_list = qmp_query_pci(&err); + if (err) { + error_free(err); + return; + } + + for (info = info_list; info; info = info->next) { + PciInfo *bus_info = info->value; + + if (bus_info->bus == 0) { + continue; + } + + scope = acpi_scope("\\_SB"); + dev = acpi_device("PC%.02X", (uint8_t)bus_info->bus); + aml_append(&dev, acpi_name_decl("_HID", acpi_string("PNP0A03"))); + aml_append(&dev, + acpi_name_decl("_BBN", acpi_int((uint8_t)bus_info->bus))); + aml_append(&scope, dev); + aml_append(&ssdt, scope); + } + qapi_free_PciInfoList(info_list); + } + scope = acpi_scope("\\_SB.PCI0"); /* build PCI0._CRS */ crs = acpi_resource_template(); -- 2.1.0