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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Andrew Jones" <drjones@redhat.com>,
	"Greg Bellows" <greg.bellows@linaro.org>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	patches@linaro.org
Subject: [Qemu-devel] [PATCH v2 02/11] target-arm: Make arm_current_el() return sensible values for M profile
Date: Thu, 29 Jan 2015 18:55:08 +0000	[thread overview]
Message-ID: <1422557717-19120-3-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1422557717-19120-1-git-send-email-peter.maydell@linaro.org>

Although M profile doesn't have the same concept of exception level
as A profile, it does have a notion of privileged versus not, which
we currently track in the privmode TB flag. Support returning this
information if arm_current_el() is called on an M profile core, so
that we can identify the correct MMU index to use (and put the MMU
index in the TB flags) without having to special-case M profile.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Greg Bellows <greg.bellows@linaro.org>
---
 target-arm/cpu.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index cd7a9e8..3eb00f4 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -1211,6 +1211,10 @@ static inline bool cptype_valid(int cptype)
  */
 static inline int arm_current_el(CPUARMState *env)
 {
+    if (arm_feature(env, ARM_FEATURE_M)) {
+        return !((env->v7m.exception == 0) && (env->v7m.control & 1));
+    }
+
     if (is_a64(env)) {
         return extract32(env->pstate, 2, 2);
     }
-- 
1.9.1

  parent reply	other threads:[~2015-01-29 18:55 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-29 18:55 [Qemu-devel] [PATCH v2 00/11] target-arm: handle mmu_idx/translation regimes properly Peter Maydell
2015-01-29 18:55 ` [Qemu-devel] [PATCH v2 01/11] cpu_ldst.h: Allow NB_MMU_MODES to be 7 Peter Maydell
2015-02-02 20:56   ` Richard Henderson
2015-01-29 18:55 ` Peter Maydell [this message]
2015-01-29 18:55 ` [Qemu-devel] [PATCH v2 03/11] target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STT Peter Maydell
2015-01-29 23:49   ` Edgar E. Iglesias
2015-01-29 18:55 ` [Qemu-devel] [PATCH v2 04/11] target-arm: Define correct mmu_idx values and pass them in TB flags Peter Maydell
2015-01-29 18:55 ` [Qemu-devel] [PATCH v2 05/11] target-arm: Use correct mmu_idx for unprivileged loads and stores Peter Maydell
2015-01-29 18:55 ` [Qemu-devel] [PATCH v2 06/11] target-arm: Don't define any MMU_MODE*_SUFFIXes Peter Maydell
2015-01-30  1:49   ` Edgar E. Iglesias
2015-01-29 18:55 ` [Qemu-devel] [PATCH v2 07/11] target-arm: Split AArch64 cases out of ats_write() Peter Maydell
2015-01-30  2:32   ` Edgar E. Iglesias
2015-01-29 18:55 ` [Qemu-devel] [PATCH v2 08/11] target-arm: Pass mmu_idx to get_phys_addr() Peter Maydell
2015-01-30  2:09   ` Edgar E. Iglesias
2015-01-29 18:55 ` [Qemu-devel] [PATCH v2 09/11] target-arm: Use mmu_idx in get_phys_addr() Peter Maydell
2015-01-30  2:03   ` Edgar E. Iglesias
2015-01-30 10:24     ` Peter Maydell
2015-01-30 15:06   ` Greg Bellows
2015-01-29 18:55 ` [Qemu-devel] [PATCH v2 10/11] target-arm: Reindent ancient page-table-walk code Peter Maydell
2015-01-30  1:39   ` Edgar E. Iglesias
2015-01-29 18:55 ` [Qemu-devel] [PATCH v2 11/11] target-arm: Fix brace style in reindented code Peter Maydell
2015-01-30  1:45   ` Edgar E. Iglesias
2015-01-30  1:36 ` [Qemu-devel] [PATCH v2 00/11] target-arm: handle mmu_idx/translation regimes properly Edgar E. Iglesias
2015-01-30 10:42   ` Peter Maydell
2015-02-03 11:31 ` Peter Maydell

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