From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50243) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YJQQv-0000E0-Kb for qemu-devel@nongnu.org; Thu, 05 Feb 2015 12:41:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YJQQu-0004oh-Pj for qemu-devel@nongnu.org; Thu, 05 Feb 2015 12:41:41 -0500 Received: from mx1.redhat.com ([209.132.183.28]:39607) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YJQQu-0004oY-Iv for qemu-devel@nongnu.org; Thu, 05 Feb 2015 12:41:40 -0500 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id t15HfdVA028520 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL) for ; Thu, 5 Feb 2015 12:41:39 -0500 From: John Snow Date: Thu, 5 Feb 2015 12:41:17 -0500 Message-Id: <1423158090-25580-7-git-send-email-jsnow@redhat.com> In-Reply-To: <1423158090-25580-1-git-send-email-jsnow@redhat.com> References: <1423158090-25580-1-git-send-email-jsnow@redhat.com> Subject: [Qemu-devel] [PATCH v3 06/19] libqos/ahci: Add ahci_port_check_interrupts helper List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: famz@redhat.com, mst@redhat.com, armbru@redhat.com, stefanha@redhat.com, pbonzini@redhat.com, John Snow A helper that compares a given port's current interrupts and checks them against a supplied list of expected interrupt bits, and throws an error if they do not match. The helper then resets the requested interrupts on this port, and asserts that the interrupt register is now empty. Signed-off-by: John Snow Reviewed-by: Paolo Bonzini --- tests/ahci-test.c | 13 ++----------- tests/libqos/ahci.c | 14 ++++++++++++++ tests/libqos/ahci.h | 2 ++ 3 files changed, 18 insertions(+), 11 deletions(-) diff --git a/tests/ahci-test.c b/tests/ahci-test.c index a3e8f12..32b6be3 100644 --- a/tests/ahci-test.c +++ b/tests/ahci-test.c @@ -747,19 +747,10 @@ static void ahci_test_identify(AHCIQState *ahci) while (BITSET(ahci_px_rreg(ahci, i, AHCI_PX_TFD), AHCI_PX_TFD_STS_BSY)) { usleep(50); } + /* Check registers for post-command consistency */ ahci_port_check_error(ahci, i); - - /* Check for expected interrupts */ - reg = ahci_px_rreg(ahci, i, AHCI_PX_IS); - ASSERT_BIT_SET(reg, AHCI_PX_IS_DHRS); - ASSERT_BIT_SET(reg, AHCI_PX_IS_PSS); /* BUG: we expect AHCI_PX_IS_DPS to be set. */ - ASSERT_BIT_CLEAR(reg, AHCI_PX_IS_DPS); - - /* Clear expected interrupts and assert all interrupts now cleared. */ - ahci_px_wreg(ahci, i, AHCI_PX_IS, - AHCI_PX_IS_DHRS | AHCI_PX_IS_PSS | AHCI_PX_IS_DPS); - g_assert_cmphex(ahci_px_rreg(ahci, i, AHCI_PX_IS), ==, 0); + ahci_port_check_interrupts(ahci, i, AHCI_PX_IS_DHRS | AHCI_PX_IS_PSS); /* Investigate the CMD, assert that we read 512 bytes */ ahci_get_command_header(ahci, i, cx, &cmd); diff --git a/tests/libqos/ahci.c b/tests/libqos/ahci.c index f3fa472..97dcc99 100644 --- a/tests/libqos/ahci.c +++ b/tests/libqos/ahci.c @@ -333,6 +333,20 @@ void ahci_port_check_error(AHCIQState *ahci, uint8_t port) ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_ERR); } +void ahci_port_check_interrupts(AHCIQState *ahci, uint8_t port, + uint32_t intr_mask) +{ + uint32_t reg; + + /* Check for expected interrupts */ + reg = ahci_px_rreg(ahci, port, AHCI_PX_IS); + ASSERT_BIT_SET(reg, intr_mask); + + /* Clear expected interrupts and assert all interrupts now cleared. */ + ahci_px_wreg(ahci, port, AHCI_PX_IS, intr_mask); + g_assert_cmphex(ahci_px_rreg(ahci, port, AHCI_PX_IS), ==, 0); +} + /* Get the command in #slot of port #port. */ void ahci_get_command_header(AHCIQState *ahci, uint8_t port, uint8_t slot, AHCICommandHeader *cmd) diff --git a/tests/libqos/ahci.h b/tests/libqos/ahci.h index af62a8a..a2ffa70 100644 --- a/tests/libqos/ahci.h +++ b/tests/libqos/ahci.h @@ -434,6 +434,8 @@ void ahci_hba_enable(AHCIQState *ahci); unsigned ahci_port_select(AHCIQState *ahci); void ahci_port_clear(AHCIQState *ahci, uint8_t port); void ahci_port_check_error(AHCIQState *ahci, uint8_t port); +void ahci_port_check_interrupts(AHCIQState *ahci, uint8_t port, + uint32_t intr_mask); void ahci_get_command_header(AHCIQState *ahci, uint8_t port, uint8_t slot, AHCICommandHeader *cmd); void ahci_set_command_header(AHCIQState *ahci, uint8_t port, -- 1.9.3