From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60541) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YL8Ox-0004IS-NT for qemu-devel@nongnu.org; Tue, 10 Feb 2015 05:50:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YL8Os-00055i-EZ for qemu-devel@nongnu.org; Tue, 10 Feb 2015 05:50:43 -0500 Received: from mail-pd0-f176.google.com ([209.85.192.176]:33132) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YL8Os-00055S-8m for qemu-devel@nongnu.org; Tue, 10 Feb 2015 05:50:38 -0500 Received: by pdbnh10 with SMTP id nh10so35751805pdb.0 for ; Tue, 10 Feb 2015 02:50:37 -0800 (PST) From: Greg Bellows Date: Tue, 10 Feb 2015 18:50:11 +0800 Message-Id: <1423565415-5844-1-git-send-email-greg.bellows@linaro.org> Subject: [Qemu-devel] [PATCH v4 0/4] target-arm: ARM64: Adding EL1 AARCH32 guest support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org, christoffer.dall@linaro.org, alex.bennee@linaro.org, edgar.iglesias@gmail.com Cc: Greg Bellows Added support for running an AArch32 guest on a AArch64 KVM host. Support has only been added to the QEMU machvirt machine. The addition of CPU properties specifiable from the command line were added to allow disablement of AArch64 execution state hereby forcing EL1 to be AArch32. The new CPU command line property is "aarch64=on/off" that is specified as follows: aarch64-softmmu/qemu-system-aarch64 -M virt -cpu cortex-a57,aarch64=off ... --- v3 -> v4 - Move and fix sync functions to properly handle current EL/PL - Replace use of strtok - Add disablement of aarch64 option if KVM disabled - Revert and update AArch64 check on vcpu init to not check for AARch64 feature but rather AArch64 family type. - Relocate register sync on get - add missing env->aarch64 refresh after pstate fetch v2 -> v3 - Fix KVM64/AArch64 hang by conditionalizing register sync - Conditionalize 64-bit interrupt handler setting of aarch64 v1 -> v2 - Replaced custom property parsing with use of generic CPU property parser - Added CPU property registration - Fixed mulitple property handling in virt.c - Removed unnecessary kernel load changes Greg Bellows (4): target-arm: Add CPU property to disable AArch64 target-arm: Add feature parsing to virt target-arm: Add 32/64-bit register sync target-arm: Add AArch32 guest support to KVM64 hw/arm/virt.c | 20 +++++- target-arm/cpu.c | 5 +- target-arm/cpu.h | 2 + target-arm/cpu64.c | 39 +++++++++++ target-arm/helper-a64.c | 5 +- target-arm/helper.c | 181 ++++++++++++++++++++++++++++++++++++++++++++++++ target-arm/kvm64.c | 38 ++++++++-- target-arm/op_helper.c | 6 +- 8 files changed, 280 insertions(+), 16 deletions(-) -- 1.8.3.2