From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 10/12] target-arm: A64: Fix handling of rotate in logic_imm_decode_wmask
Date: Fri, 13 Feb 2015 05:54:43 +0000 [thread overview]
Message-ID: <1423806885-9548-11-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1423806885-9548-1-git-send-email-peter.maydell@linaro.org>
The code in logic_imm_decode_wmask attempts to rotate a mask
value within the bottom 'e' bits of the value with
mask = (mask >> r) | (mask << (e - r));
This has two issues:
* if the element size is 64 then a rotate by zero results
in a shift left by 64, which is undefined behaviour
* if the element size is smaller than 64 then this will
leave junk in the value at bit 'e' and above, which is
not valid input to bitfield_replicate(). As it happens,
the bits at bit 'e' to '2e - r' are exactly the ones
which bitfield_replicate is going to copy in there,
so this isn't a "wrong code generated" bug, but it's
confusing and if we ever put an assert in
bitfield_replicate it would fire on valid guest code.
Fix the former by not doing anything if r is zero, and
the latter by masking with bitmask64(e).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1423233250-15853-3-git-send-email-peter.maydell@linaro.org
---
target-arm/translate-a64.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index d3801c5..94b3bf4 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -2820,7 +2820,10 @@ static bool logic_imm_decode_wmask(uint64_t *result, unsigned int immn,
* by r within the element (which is e bits wide)...
*/
mask = bitmask64(s + 1);
- mask = (mask >> r) | (mask << (e - r));
+ if (r) {
+ mask = (mask >> r) | (mask << (e - r));
+ mask &= bitmask64(e);
+ }
/* ...then replicate the element over the whole 64 bit value */
mask = bitfield_replicate(mask, e);
*result = mask;
--
1.9.1
next prev parent reply other threads:[~2015-02-13 5:54 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-13 5:54 [Qemu-devel] [PULL 00/12] target-arm queue Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 01/12] pci: Allocate PCIe host bridge PCI ID Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 02/12] pci: Add generic PCIe host bridge Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 03/12] arm: Add PCIe host bridge in virt machine Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 04/12] pci: Move PCI VGA to pci.mak Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 05/12] target-arm: Add CPU property to disable AArch64 Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 06/12] target-arm: Add feature parsing to virt Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 07/12] target-arm: Add 32/64-bit register sync Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 08/12] target-arm: Add AArch32 guest support to KVM64 Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 09/12] target-arm: A64: Fix shifts into sign bit Peter Maydell
2015-02-13 5:54 ` Peter Maydell [this message]
2015-02-13 5:54 ` [Qemu-devel] [PULL 11/12] target-arm: A64: Avoid left shifting negative integers in disas_pc_rel_addr Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 12/12] target-arm: A64: Avoid signed shifts in disas_ldst_pair() Peter Maydell
2015-02-13 11:04 ` [Qemu-devel] [PULL 00/12] target-arm queue Peter Maydell
2015-02-13 11:44 ` Peter Maydell
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