From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 05/12] target-arm: Add CPU property to disable AArch64
Date: Fri, 13 Feb 2015 05:54:38 +0000 [thread overview]
Message-ID: <1423806885-9548-6-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1423806885-9548-1-git-send-email-peter.maydell@linaro.org>
From: Greg Bellows <greg.bellows@linaro.org>
Adds registration and get/set functions for enabling/disabling the AArch64
execution state on AArch64 CPUs. By default AArch64 execution state is enabled
on AArch64 CPUs, setting the property to off, will disable the execution state.
The below QEMU invocation would have AArch64 execution state disabled.
$ ./qemu-system-aarch64 -machine virt -cpu cortex-a57,aarch64=off
Also adds stripping of features from CPU model string in acquiring the ARM CPU
by name.
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1423736974-14254-2-git-send-email-greg.bellows@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/cpu.c | 5 ++++-
target-arm/cpu64.c | 39 +++++++++++++++++++++++++++++++++++++++
2 files changed, 43 insertions(+), 1 deletion(-)
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index d38af74..986f04c 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -544,13 +544,16 @@ static ObjectClass *arm_cpu_class_by_name(const char *cpu_model)
{
ObjectClass *oc;
char *typename;
+ char **cpuname;
if (!cpu_model) {
return NULL;
}
- typename = g_strdup_printf("%s-" TYPE_ARM_CPU, cpu_model);
+ cpuname = g_strsplit(cpu_model, ",", 1);
+ typename = g_strdup_printf("%s-" TYPE_ARM_CPU, cpuname[0]);
oc = object_class_by_name(typename);
+ g_strfreev(cpuname);
g_free(typename);
if (!oc || !object_class_dynamic_cast(oc, TYPE_ARM_CPU) ||
object_class_is_abstract(oc)) {
diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c
index bb778b3d..823c739 100644
--- a/target-arm/cpu64.c
+++ b/target-arm/cpu64.c
@@ -32,6 +32,11 @@ static inline void set_feature(CPUARMState *env, int feature)
env->features |= 1ULL << feature;
}
+static inline void unset_feature(CPUARMState *env, int feature)
+{
+ env->features &= ~(1ULL << feature);
+}
+
#ifndef CONFIG_USER_ONLY
static uint64_t a57_l2ctlr_read(CPUARMState *env, const ARMCPRegInfo *ri)
{
@@ -170,8 +175,42 @@ static const ARMCPUInfo aarch64_cpus[] = {
{ .name = NULL }
};
+static bool aarch64_cpu_get_aarch64(Object *obj, Error **errp)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+
+ return arm_feature(&cpu->env, ARM_FEATURE_AARCH64);
+}
+
+static void aarch64_cpu_set_aarch64(Object *obj, bool value, Error **errp)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+
+ /* At this time, this property is only allowed if KVM is enabled. This
+ * restriction allows us to avoid fixing up functionality that assumes a
+ * uniform execution state like do_interrupt.
+ */
+ if (!kvm_enabled()) {
+ error_setg(errp, "'aarch64' feature cannot be disabled "
+ "unless KVM is enabled");
+ return;
+ }
+
+ if (value == false) {
+ unset_feature(&cpu->env, ARM_FEATURE_AARCH64);
+ } else {
+ set_feature(&cpu->env, ARM_FEATURE_AARCH64);
+ }
+}
+
static void aarch64_cpu_initfn(Object *obj)
{
+ object_property_add_bool(obj, "aarch64", aarch64_cpu_get_aarch64,
+ aarch64_cpu_set_aarch64, NULL);
+ object_property_set_description(obj, "aarch64",
+ "Set on/off to enable/disable aarch64 "
+ "execution state ",
+ NULL);
}
static void aarch64_cpu_finalizefn(Object *obj)
--
1.9.1
next prev parent reply other threads:[~2015-02-13 5:54 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-13 5:54 [Qemu-devel] [PULL 00/12] target-arm queue Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 01/12] pci: Allocate PCIe host bridge PCI ID Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 02/12] pci: Add generic PCIe host bridge Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 03/12] arm: Add PCIe host bridge in virt machine Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 04/12] pci: Move PCI VGA to pci.mak Peter Maydell
2015-02-13 5:54 ` Peter Maydell [this message]
2015-02-13 5:54 ` [Qemu-devel] [PULL 06/12] target-arm: Add feature parsing to virt Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 07/12] target-arm: Add 32/64-bit register sync Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 08/12] target-arm: Add AArch32 guest support to KVM64 Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 09/12] target-arm: A64: Fix shifts into sign bit Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 10/12] target-arm: A64: Fix handling of rotate in logic_imm_decode_wmask Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 11/12] target-arm: A64: Avoid left shifting negative integers in disas_pc_rel_addr Peter Maydell
2015-02-13 5:54 ` [Qemu-devel] [PULL 12/12] target-arm: A64: Avoid signed shifts in disas_ldst_pair() Peter Maydell
2015-02-13 11:04 ` [Qemu-devel] [PULL 00/12] target-arm queue Peter Maydell
2015-02-13 11:44 ` Peter Maydell
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