From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37851) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YOCQu-0000zt-A0 for qemu-devel@nongnu.org; Wed, 18 Feb 2015 16:45:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YOCQr-0003Ak-4T for qemu-devel@nongnu.org; Wed, 18 Feb 2015 16:45:24 -0500 Received: from mail.kernel.org ([198.145.29.136]:51314) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YOCQq-0003Ae-Nb for qemu-devel@nongnu.org; Wed, 18 Feb 2015 16:45:20 -0500 Date: Wed, 18 Feb 2015 22:45:13 +0100 From: "Michael S. Tsirkin" Message-ID: <1424295164-4774-13-git-send-email-mst@redhat.com> References: <1424295164-4774-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1424295164-4774-1-git-send-email-mst@redhat.com> Subject: [Qemu-devel] [PULL 12/96] ide/ich: Convert to realize List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Kevin Wolf , Peter Maydell , Juan Quintela , dgilbert@redhat.com, Markus Armbruster , Gonglei , Stefan Hajnoczi From: Markus Armbruster Signed-off-by: Markus Armbruster Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Gonglei --- hw/ide/ich.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/hw/ide/ich.c b/hw/ide/ich.c index fb1d095..b1d8874 100644 --- a/hw/ide/ich.c +++ b/hw/ide/ich.c @@ -98,7 +98,7 @@ static void pci_ich9_reset(DeviceState *dev) ahci_reset(&d->ahci); } -static int pci_ich9_ahci_init(PCIDevice *dev) +static void pci_ich9_ahci_realize(PCIDevice *dev, Error **errp) { struct AHCIPCIState *d; int sata_cap_offset; @@ -123,10 +123,11 @@ static int pci_ich9_ahci_init(PCIDevice *dev) pci_register_bar(dev, ICH9_MEM_BAR, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->ahci.mem); - sata_cap_offset = pci_add_capability(dev, PCI_CAP_ID_SATA, - ICH9_SATA_CAP_OFFSET, SATA_CAP_SIZE); + sata_cap_offset = pci_add_capability2(dev, PCI_CAP_ID_SATA, + ICH9_SATA_CAP_OFFSET, SATA_CAP_SIZE, + errp); if (sata_cap_offset < 0) { - return sata_cap_offset; + return; } sata_cap = dev->config + sata_cap_offset; @@ -139,8 +140,6 @@ static int pci_ich9_ahci_init(PCIDevice *dev) * should be PMCAP, the Intel ICH9 data sheet specifies that the ICH9 * AHCI device puts the MSI capability first, pointing to 0x80. */ msi_init(dev, ICH9_MSI_CAP_OFFSET, 1, true, false); - - return 0; } static void pci_ich9_uninit(PCIDevice *dev) @@ -158,7 +157,7 @@ static void ich_ahci_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); - k->init = pci_ich9_ahci_init; + k->realize = pci_ich9_ahci_realize; k->exit = pci_ich9_uninit; k->vendor_id = PCI_VENDOR_ID_INTEL; k->device_id = PCI_DEVICE_ID_INTEL_82801IR; -- MST