From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47773) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YOrpb-0007FO-MR for qemu-devel@nongnu.org; Fri, 20 Feb 2015 12:57:40 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YOrpZ-0000hY-0I for qemu-devel@nongnu.org; Fri, 20 Feb 2015 12:57:39 -0500 Received: from mail-we0-x22b.google.com ([2a00:1450:400c:c03::22b]:35739) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YOrpY-0000hT-Qf for qemu-devel@nongnu.org; Fri, 20 Feb 2015 12:57:36 -0500 Received: by wevl61 with SMTP id l61so2874300wev.2 for ; Fri, 20 Feb 2015 09:57:36 -0800 (PST) Sender: Paolo Bonzini From: Paolo Bonzini Date: Fri, 20 Feb 2015 18:57:17 +0100 Message-Id: <1424455040-3335-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PATCH v2 for-2.3 0/3] Support more than 8 MMU modes, speedup PPC by 10% List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: agraf@suse.de Patches 1 and 2 enable support from more than 8 MMU modes in TCG (patch 1 is in the targets, patch 2 is in cpu-defs.h). The TLB size is reduced proportionally on targets where that is necessary. Patch 3 uses the new support in the PPC target. Paolo Paolo Bonzini (3): tcg: add TCG_TARGET_TLB_DISPLACEMENT_BITS softmmu: support up to 12 MMU modes target-ppc: use separate indices for various translation modes include/exec/cpu-defs.h | 34 +++++++++++++++- include/exec/cpu_ldst.h | 104 ++++++++++++++++++++++++++++++++++++++++++++--- target-ppc/cpu.h | 12 +++--- target-ppc/excp_helper.c | 3 -- target-ppc/helper_regs.h | 15 ++++--- tcg/aarch64/tcg-target.h | 1 + tcg/arm/tcg-target.h | 1 + tcg/i386/tcg-target.h | 1 + tcg/ia64/tcg-target.h | 2 + tcg/mips/tcg-target.h | 1 + tcg/ppc/tcg-target.h | 1 + tcg/s390/tcg-target.h | 1 + tcg/sparc/tcg-target.h | 1 + tcg/tci/tcg-target.h | 1 + 14 files changed, 156 insertions(+), 22 deletions(-) -- 2.3.0