From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49119) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YQNQv-0000mc-W3 for qemu-devel@nongnu.org; Tue, 24 Feb 2015 16:54:30 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YQNQl-0007ia-6p for qemu-devel@nongnu.org; Tue, 24 Feb 2015 16:54:25 -0500 Received: from e33.co.us.ibm.com ([32.97.110.151]:41041) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YQNQk-0007iM-Nj for qemu-devel@nongnu.org; Tue, 24 Feb 2015 16:54:14 -0500 Received: from /spool/local by e33.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 24 Feb 2015 14:54:14 -0700 From: Michael Roth Date: Tue, 24 Feb 2015 15:48:11 -0600 Message-Id: <1424814498-6993-37-git-send-email-mdroth@linux.vnet.ibm.com> In-Reply-To: <1424814498-6993-1-git-send-email-mdroth@linux.vnet.ibm.com> References: <1424814498-6993-1-git-send-email-mdroth@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH 36/43] target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STT List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , qemu-stable@nongnu.org From: Peter Maydell The LDT/STT (load/store unprivileged) instruction decode was using the wrong MMU index value. This meant that instead of these insns being "always access as if user-mode regardless of current privilege" they were "always access as if kernel-mode regardless of current privilege". This went unnoticed because AArch64 Linux doesn't use these instructions. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell Reviewed-by: Greg Bellows Reviewed-by: Edgar E. Iglesias --- I'm not counting this as a security issue because I'm assuming nobody treats TCG guests as a security boundary (certainly I would not recommend doing so...) (cherry picked from commit 949013ce111eb64f8bc81cf9a9f1cefd6a1678c3) Signed-off-by: Michael Roth --- target-arm/translate-a64.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 80d2c07..97206aa 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -2107,7 +2107,7 @@ static void disas_ldst_reg_imm9(DisasContext *s, uint32_t insn) } } else { TCGv_i64 tcg_rt = cpu_reg(s, rt); - int memidx = is_unpriv ? 1 : get_mem_index(s); + int memidx = is_unpriv ? MMU_USER_IDX : get_mem_index(s); if (is_store) { do_gpr_st_memidx(s, tcg_rt, tcg_addr, size, memidx); -- 1.9.1