From: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 0/6] tricore patches for 2.3
Date: Tue, 3 Mar 2015 01:18:19 +0000 [thread overview]
Message-ID: <1425345505-17863-1-git-send-email-kbastian@mail.uni-paderborn.de> (raw)
The following changes since commit b8a173b25c887a606681fc35a46702c164d5b2d0:
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into staging (2015-03-02 14:25:48 +0000)
are available in the git repository at:
https://github.com/bkoppelmann/qemu-tricore-upstream.git tags/pull-tricore-20150303
for you to fetch changes up to bebe80fc78cc91c4225cfb98ef3a916b9c861c60:
target-tricore: Add instructions of RRR1 opcode format, which have 0xc3 as first opcode (2015-03-03 01:06:00 +0000)
----------------------------------------------------------------
TriCore RRR1, RRR2 instructions and bugfixes
----------------------------------------------------------------
Bastian Koppelmann (6):
target-tricore: Fix RLC_ADDI, RLC_ADDIH using wrong microcode helper
target-tricore: fix msub32_suov return wrong results
target-tricore: Add instructions of RRR2 opcode format
target-tricore: Add instructions of RRR1 opcode format, which have
0x83 as first opcode
target-tricore: Add instructions of RRR1 opcode format, which have
0x43 as first opcode
target-tricore: Add instructions of RRR1 opcode format, which have
0xc3 as first opcode
target-tricore/helper.h | 9 +
target-tricore/op_helper.c | 374 +++++++++-
target-tricore/translate.c | 1391 ++++++++++++++++++++++++++++++++++++--
target-tricore/tricore-opcodes.h | 10 +-
4 files changed, 1728 insertions(+), 56 deletions(-)
--
2.3.1
next reply other threads:[~2015-03-03 0:17 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-03 1:18 Bastian Koppelmann [this message]
2015-03-03 1:18 ` [Qemu-devel] [PULL 1/6] target-tricore: Fix RLC_ADDI, RLC_ADDIH using wrong microcode helper Bastian Koppelmann
2015-03-03 1:18 ` [Qemu-devel] [PULL 2/6] target-tricore: fix msub32_suov return wrong results Bastian Koppelmann
2015-03-03 1:18 ` [Qemu-devel] [PULL 3/6] target-tricore: Add instructions of RRR2 opcode format Bastian Koppelmann
2015-03-03 1:18 ` [Qemu-devel] [PULL 4/6] target-tricore: Add instructions of RRR1 opcode format, which have 0x83 as first opcode Bastian Koppelmann
2015-03-03 1:18 ` [Qemu-devel] [PULL 5/6] target-tricore: Add instructions of RRR1 opcode format, which have 0x43 " Bastian Koppelmann
2015-03-03 1:18 ` [Qemu-devel] [PULL 6/6] target-tricore: Add instructions of RRR1 opcode format, which have 0xc3 " Bastian Koppelmann
2015-03-08 6:42 ` [Qemu-devel] [PULL 0/6] tricore patches for 2.3 Peter Maydell
-- strict thread matches above, loose matches on Subject: below --
2015-03-16 16:02 Bastian Koppelmann
2015-03-16 19:18 ` Peter Maydell
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