From: Eduardo Habkost <ehabkost@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Gu Zheng" <guz.fnst@cn.fujitsu.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Andreas Färber" <afaerber@suse.de>,
"Paolo Bonzini" <pbonzini@redhat.com>
Subject: [Qemu-devel] [PATCH v4 3/5] target-i386: Move CPUX86State.cpuid_apic_id to X86CPU.apic_id
Date: Tue, 3 Mar 2015 23:13:42 -0300 [thread overview]
Message-ID: <1425435224-2630-4-git-send-email-ehabkost@redhat.com> (raw)
In-Reply-To: <1425435224-2630-1-git-send-email-ehabkost@redhat.com>
The field doesn't need to be inside CPUState, and it is not specific for
the CPUID instruction, so move and rename it.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
target-i386/cpu-qom.h | 1 +
target-i386/cpu.c | 15 +++++++--------
target-i386/cpu.h | 1 -
target-i386/kvm.c | 2 +-
4 files changed, 9 insertions(+), 10 deletions(-)
diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h
index b557b61..4a6f48a 100644
--- a/target-i386/cpu-qom.h
+++ b/target-i386/cpu-qom.h
@@ -93,6 +93,7 @@ typedef struct X86CPU {
bool expose_kvm;
bool migratable;
bool host_features;
+ uint32_t apic_id;
/* if true the CPUID code directly forward host cache leaves to the guest */
bool cache_info_passthrough;
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 05cac57..1fb1df4 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1690,7 +1690,7 @@ static void x86_cpuid_get_apic_id(Object *obj, Visitor *v, void *opaque,
const char *name, Error **errp)
{
X86CPU *cpu = X86_CPU(obj);
- int64_t value = cpu->env.cpuid_apic_id;
+ int64_t value = cpu->apic_id;
visit_type_int(v, &value, name, errp);
}
@@ -1723,11 +1723,11 @@ static void x86_cpuid_set_apic_id(Object *obj, Visitor *v, void *opaque,
return;
}
- if ((value != cpu->env.cpuid_apic_id) && cpu_exists(value)) {
+ if ((value != cpu->apic_id) && cpu_exists(value)) {
error_setg(errp, "CPU with APIC ID %" PRIi64 " exists", value);
return;
}
- cpu->env.cpuid_apic_id = value;
+ cpu->apic_id = value;
}
/* Generic getter for "feature-words" and "filtered-features" properties */
@@ -2272,7 +2272,8 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
break;
case 1:
*eax = env->cpuid_version;
- *ebx = (env->cpuid_apic_id << 24) | 8 << 8; /* CLFLUSH size in quad words, Linux wants it. */
+ *ebx = (cpu->apic_id << 24) |
+ 8 << 8; /* CLFLUSH size in quad words, Linux wants it. */
*ecx = env->features[FEAT_1_ECX];
*edx = env->features[FEAT_1_EDX];
if (cs->nr_cores * cs->nr_threads > 1) {
@@ -2721,7 +2722,6 @@ static void mce_init(X86CPU *cpu)
#ifndef CONFIG_USER_ONLY
static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
{
- CPUX86State *env = &cpu->env;
DeviceState *dev = DEVICE(cpu);
APICCommonState *apic;
const char *apic_type = "apic";
@@ -2740,7 +2740,7 @@ static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
object_property_add_child(OBJECT(cpu), "apic",
OBJECT(cpu->apic_state), NULL);
- qdev_prop_set_uint8(cpu->apic_state, "id", env->cpuid_apic_id);
+ qdev_prop_set_uint8(cpu->apic_state, "id", cpu->apic_id);
/* TODO: convert to link<> */
apic = APIC_COMMON(cpu->apic_state);
apic->cpu = cpu;
@@ -2936,9 +2936,8 @@ static void x86_cpu_initfn(Object *obj)
static int64_t x86_cpu_get_arch_id(CPUState *cs)
{
X86CPU *cpu = X86_CPU(cs);
- CPUX86State *env = &cpu->env;
- return env->cpuid_apic_id;
+ return cpu->apic_id;
}
static bool x86_cpu_get_paging_enabled(const CPUState *cs)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 478450c..38bedc2 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -944,7 +944,6 @@ typedef struct CPUX86State {
uint32_t cpuid_version;
FeatureWordArray features;
uint32_t cpuid_model[12];
- uint32_t cpuid_apic_id;
/* MTRRs */
uint64_t mtrr_fixed[11];
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 40d6a14..27fe2be 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -430,7 +430,7 @@ static void cpu_update_state(void *opaque, int running, RunState state)
unsigned long kvm_arch_vcpu_id(CPUState *cs)
{
X86CPU *cpu = X86_CPU(cs);
- return cpu->env.cpuid_apic_id;
+ return cpu->apic_id;
}
#ifndef KVM_CPUID_SIGNATURE_NEXT
--
2.1.0
next prev parent reply other threads:[~2015-03-04 2:17 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-04 2:13 [Qemu-devel] [PATCH v4 0/5] target-i386: Simplify APIC ID initialization, move compat code to pc.c Eduardo Habkost
2015-03-04 2:13 ` [Qemu-devel] [PATCH v4 1/5] target-i386: Move topology.h to include/hw/i386 Eduardo Habkost
2015-03-04 2:13 ` [Qemu-devel] [PATCH v4 2/5] target-i386: Remove unused APIC ID default code Eduardo Habkost
2015-03-05 13:43 ` Eduardo Habkost
2015-03-05 13:46 ` Paolo Bonzini
2015-03-05 18:35 ` Andreas Färber
2015-03-05 18:46 ` Eduardo Habkost
2015-03-06 20:27 ` Eduardo Habkost
2015-03-04 2:13 ` Eduardo Habkost [this message]
2015-03-04 14:20 ` [Qemu-devel] [PATCH v4 3/5] target-i386: Move CPUX86State.cpuid_apic_id to X86CPU.apic_id Andreas Färber
2015-03-04 15:02 ` Eduardo Habkost
2015-03-04 2:13 ` [Qemu-devel] [PATCH v4 4/5] target-i386: Move APIC ID compatibility code to pc.c Eduardo Habkost
2015-03-05 0:32 ` Andreas Färber
2015-03-05 13:37 ` Eduardo Habkost
2015-03-05 15:47 ` Andreas Färber
2015-03-06 15:29 ` Eduardo Habkost
2015-03-04 2:13 ` [Qemu-devel] [PATCH v4 5/5] target-i386: Require APIC ID to be explicitly set before CPU realize Eduardo Habkost
2015-03-05 0:22 ` Andreas Färber
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