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From: Eduardo Habkost <ehabkost@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Gu Zheng" <guz.fnst@cn.fujitsu.com>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Andreas Färber" <afaerber@suse.de>,
	"Paolo Bonzini" <pbonzini@redhat.com>
Subject: [Qemu-devel] [PATCH v4 4/5] target-i386: Move APIC ID compatibility code to pc.c
Date: Tue,  3 Mar 2015 23:13:43 -0300	[thread overview]
Message-ID: <1425435224-2630-5-git-send-email-ehabkost@redhat.com> (raw)
In-Reply-To: <1425435224-2630-1-git-send-email-ehabkost@redhat.com>

The APIC ID compatibility code is required only for PC, and now that
x86_cpu_initfn() doesn't use x86_cpu_apic_id_from_index() anymore, that
code can be moved to pc.c.

Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 hw/i386/pc.c      | 35 +++++++++++++++++++++++++++++++++++
 target-i386/cpu.c | 34 ----------------------------------
 2 files changed, 35 insertions(+), 34 deletions(-)

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index b229856..8c3c470 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -25,6 +25,8 @@
 #include "hw/i386/pc.h"
 #include "hw/char/serial.h"
 #include "hw/i386/apic.h"
+#include "hw/i386/topology.h"
+#include "sysemu/cpus.h"
 #include "hw/block/fdc.h"
 #include "hw/ide.h"
 #include "hw/pci/pci.h"
@@ -629,6 +631,39 @@ bool e820_get_entry(int idx, uint32_t type, uint64_t *address, uint64_t *length)
     return false;
 }
 
+/* Enables contiguous-apic-ID mode, for compatibility */
+static bool compat_apic_id_mode;
+
+void enable_compat_apic_id_mode(void)
+{
+    compat_apic_id_mode = true;
+}
+
+/* Calculates initial APIC ID for a specific CPU index
+ *
+ * Currently we need to be able to calculate the APIC ID from the CPU index
+ * alone (without requiring a CPU object), as the QEMU<->Seabios interfaces have
+ * no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of
+ * all CPUs up to max_cpus.
+ */
+uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
+{
+    uint32_t correct_id;
+    static bool warned;
+
+    correct_id = x86_apicid_from_cpu_idx(smp_cores, smp_threads, cpu_index);
+    if (compat_apic_id_mode) {
+        if (cpu_index != correct_id && !warned) {
+            error_report("APIC IDs set in compatibility mode, "
+                         "CPU topology won't match the configuration");
+            warned = true;
+        }
+        return cpu_index;
+    } else {
+        return correct_id;
+    }
+}
+
 /* Calculates the limit to CPU APIC ID values
  *
  * This function returns the limit for the APIC ID value, so that all
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 1fb1df4..49a5e58 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -25,7 +25,6 @@
 #include "sysemu/kvm.h"
 #include "sysemu/cpus.h"
 #include "kvm_i386.h"
-#include "hw/i386/topology.h"
 
 #include "qemu/option.h"
 #include "qemu/config-file.h"
@@ -2844,39 +2843,6 @@ out:
     }
 }
 
-/* Enables contiguous-apic-ID mode, for compatibility */
-static bool compat_apic_id_mode;
-
-void enable_compat_apic_id_mode(void)
-{
-    compat_apic_id_mode = true;
-}
-
-/* Calculates initial APIC ID for a specific CPU index
- *
- * Currently we need to be able to calculate the APIC ID from the CPU index
- * alone (without requiring a CPU object), as the QEMU<->Seabios interfaces have
- * no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of
- * all CPUs up to max_cpus.
- */
-uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
-{
-    uint32_t correct_id;
-    static bool warned;
-
-    correct_id = x86_apicid_from_cpu_idx(smp_cores, smp_threads, cpu_index);
-    if (compat_apic_id_mode) {
-        if (cpu_index != correct_id && !warned) {
-            error_report("APIC IDs set in compatibility mode, "
-                         "CPU topology won't match the configuration");
-            warned = true;
-        }
-        return cpu_index;
-    } else {
-        return correct_id;
-    }
-}
-
 static void x86_cpu_initfn(Object *obj)
 {
     CPUState *cs = CPU(obj);
-- 
2.1.0

  parent reply	other threads:[~2015-03-04  2:17 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-04  2:13 [Qemu-devel] [PATCH v4 0/5] target-i386: Simplify APIC ID initialization, move compat code to pc.c Eduardo Habkost
2015-03-04  2:13 ` [Qemu-devel] [PATCH v4 1/5] target-i386: Move topology.h to include/hw/i386 Eduardo Habkost
2015-03-04  2:13 ` [Qemu-devel] [PATCH v4 2/5] target-i386: Remove unused APIC ID default code Eduardo Habkost
2015-03-05 13:43   ` Eduardo Habkost
2015-03-05 13:46     ` Paolo Bonzini
2015-03-05 18:35     ` Andreas Färber
2015-03-05 18:46       ` Eduardo Habkost
2015-03-06 20:27         ` Eduardo Habkost
2015-03-04  2:13 ` [Qemu-devel] [PATCH v4 3/5] target-i386: Move CPUX86State.cpuid_apic_id to X86CPU.apic_id Eduardo Habkost
2015-03-04 14:20   ` Andreas Färber
2015-03-04 15:02     ` Eduardo Habkost
2015-03-04  2:13 ` Eduardo Habkost [this message]
2015-03-05  0:32   ` [Qemu-devel] [PATCH v4 4/5] target-i386: Move APIC ID compatibility code to pc.c Andreas Färber
2015-03-05 13:37     ` Eduardo Habkost
2015-03-05 15:47       ` Andreas Färber
2015-03-06 15:29         ` Eduardo Habkost
2015-03-04  2:13 ` [Qemu-devel] [PATCH v4 5/5] target-i386: Require APIC ID to be explicitly set before CPU realize Eduardo Habkost
2015-03-05  0:22   ` Andreas Färber

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