From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53787) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YSyrx-0003kS-1e for qemu-devel@nongnu.org; Tue, 03 Mar 2015 21:17:06 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YSyrv-0004ZQ-D2 for qemu-devel@nongnu.org; Tue, 03 Mar 2015 21:17:04 -0500 Received: from mx1.redhat.com ([209.132.183.28]:55475) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YSyrv-0004ZC-6R for qemu-devel@nongnu.org; Tue, 03 Mar 2015 21:17:03 -0500 From: Eduardo Habkost Date: Tue, 3 Mar 2015 23:13:43 -0300 Message-Id: <1425435224-2630-5-git-send-email-ehabkost@redhat.com> In-Reply-To: <1425435224-2630-1-git-send-email-ehabkost@redhat.com> References: <1425435224-2630-1-git-send-email-ehabkost@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v4 4/5] target-i386: Move APIC ID compatibility code to pc.c List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Gu Zheng , Igor Mammedov , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Paolo Bonzini The APIC ID compatibility code is required only for PC, and now that x86_cpu_initfn() doesn't use x86_cpu_apic_id_from_index() anymore, that code can be moved to pc.c. Reviewed-by: Paolo Bonzini Reviewed-by: Andreas F=C3=A4rber Signed-off-by: Eduardo Habkost --- hw/i386/pc.c | 35 +++++++++++++++++++++++++++++++++++ target-i386/cpu.c | 34 ---------------------------------- 2 files changed, 35 insertions(+), 34 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index b229856..8c3c470 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -25,6 +25,8 @@ #include "hw/i386/pc.h" #include "hw/char/serial.h" #include "hw/i386/apic.h" +#include "hw/i386/topology.h" +#include "sysemu/cpus.h" #include "hw/block/fdc.h" #include "hw/ide.h" #include "hw/pci/pci.h" @@ -629,6 +631,39 @@ bool e820_get_entry(int idx, uint32_t type, uint64_t= *address, uint64_t *length) return false; } =20 +/* Enables contiguous-apic-ID mode, for compatibility */ +static bool compat_apic_id_mode; + +void enable_compat_apic_id_mode(void) +{ + compat_apic_id_mode =3D true; +} + +/* Calculates initial APIC ID for a specific CPU index + * + * Currently we need to be able to calculate the APIC ID from the CPU in= dex + * alone (without requiring a CPU object), as the QEMU<->Seabios interfa= ces have + * no concept of "CPU index", and the NUMA tables on fw_cfg need the API= C ID of + * all CPUs up to max_cpus. + */ +uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index) +{ + uint32_t correct_id; + static bool warned; + + correct_id =3D x86_apicid_from_cpu_idx(smp_cores, smp_threads, cpu_i= ndex); + if (compat_apic_id_mode) { + if (cpu_index !=3D correct_id && !warned) { + error_report("APIC IDs set in compatibility mode, " + "CPU topology won't match the configuration"); + warned =3D true; + } + return cpu_index; + } else { + return correct_id; + } +} + /* Calculates the limit to CPU APIC ID values * * This function returns the limit for the APIC ID value, so that all diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 1fb1df4..49a5e58 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -25,7 +25,6 @@ #include "sysemu/kvm.h" #include "sysemu/cpus.h" #include "kvm_i386.h" -#include "hw/i386/topology.h" =20 #include "qemu/option.h" #include "qemu/config-file.h" @@ -2844,39 +2843,6 @@ out: } } =20 -/* Enables contiguous-apic-ID mode, for compatibility */ -static bool compat_apic_id_mode; - -void enable_compat_apic_id_mode(void) -{ - compat_apic_id_mode =3D true; -} - -/* Calculates initial APIC ID for a specific CPU index - * - * Currently we need to be able to calculate the APIC ID from the CPU in= dex - * alone (without requiring a CPU object), as the QEMU<->Seabios interfa= ces have - * no concept of "CPU index", and the NUMA tables on fw_cfg need the API= C ID of - * all CPUs up to max_cpus. - */ -uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index) -{ - uint32_t correct_id; - static bool warned; - - correct_id =3D x86_apicid_from_cpu_idx(smp_cores, smp_threads, cpu_i= ndex); - if (compat_apic_id_mode) { - if (cpu_index !=3D correct_id && !warned) { - error_report("APIC IDs set in compatibility mode, " - "CPU topology won't match the configuration"); - warned =3D true; - } - return cpu_index; - } else { - return correct_id; - } -} - static void x86_cpu_initfn(Object *obj) { CPUState *cs =3D CPU(obj); --=20 2.1.0