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From: Alexander Graf <agraf@suse.de>
To: qemu-ppc@nongnu.org
Cc: Alexey Kardashevskiy <aik@ozlabs.ru>,
	peter.maydell@linaro.org, qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 01/38] spapr_vio/spapr_iommu: Move VIO bypass where it belongs
Date: Sun,  8 Mar 2015 09:44:20 +0100	[thread overview]
Message-ID: <1425804297-53727-2-git-send-email-agraf@suse.de> (raw)
In-Reply-To: <1425804297-53727-1-git-send-email-agraf@suse.de>

From: Alexey Kardashevskiy <aik@ozlabs.ru>

Instead of tweaking a TCE table device by adding there a bypass flag,
let's add an alias to RAM and IOMMU memory region, and enable/disable
those according to the selected bypass mode.
This way IOMMU memory region can have size of the actual window rather
than ram_size which is essential for upcoming DDW support.

This moves bypass logic to VIO layer and keeps @bypass flag in TCE table
for migration compatibility only. This replaces spapr_tce_set_bypass()
calls with explicit assignment to avoid confusion as the function could
do something more that just syncing the @bypass flag.

This adds a pointer to VIO device into the sPAPRTCETable struct to provide
the sPAPRTCETable device a way to update bypass mode for the VIO device.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
---
 hw/ppc/spapr_iommu.c       | 26 ++++++++++++++++----------
 hw/ppc/spapr_vio.c         | 28 ++++++++++++++++++++++++++--
 include/hw/ppc/spapr.h     |  2 +-
 include/hw/ppc/spapr_vio.h |  4 ++++
 4 files changed, 47 insertions(+), 13 deletions(-)

diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c
index ba003da..f3990fd 100644
--- a/hw/ppc/spapr_iommu.c
+++ b/hw/ppc/spapr_iommu.c
@@ -25,6 +25,7 @@
 #include "trace.h"
 
 #include "hw/ppc/spapr.h"
+#include "hw/ppc/spapr_vio.h"
 
 #include <libfdt.h>
 
@@ -73,9 +74,7 @@ static IOMMUTLBEntry spapr_tce_translate_iommu(MemoryRegion *iommu, hwaddr addr,
         .perm = IOMMU_NONE,
     };
 
-    if (tcet->bypass) {
-        ret.perm = IOMMU_RW;
-    } else if ((addr >> tcet->page_shift) < tcet->nb_table) {
+    if ((addr >> tcet->page_shift) < tcet->nb_table) {
         /* Check if we are in bound */
         hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
 
@@ -91,10 +90,22 @@ static IOMMUTLBEntry spapr_tce_translate_iommu(MemoryRegion *iommu, hwaddr addr,
     return ret;
 }
 
+static int spapr_tce_table_post_load(void *opaque, int version_id)
+{
+    sPAPRTCETable *tcet = SPAPR_TCE_TABLE(opaque);
+
+    if (tcet->vdev) {
+        spapr_vio_set_bypass(tcet->vdev, tcet->bypass);
+    }
+
+    return 0;
+}
+
 static const VMStateDescription vmstate_spapr_tce_table = {
     .name = "spapr_iommu",
     .version_id = 2,
     .minimum_version_id = 2,
+    .post_load = spapr_tce_table_post_load,
     .fields      = (VMStateField []) {
         /* Sanity check */
         VMSTATE_UINT32_EQUAL(liobn, sPAPRTCETable),
@@ -132,7 +143,8 @@ static int spapr_tce_table_realize(DeviceState *dev)
     trace_spapr_iommu_new_table(tcet->liobn, tcet, tcet->table, tcet->fd);
 
     memory_region_init_iommu(&tcet->iommu, OBJECT(dev), &spapr_iommu_ops,
-                             "iommu-spapr", ram_size);
+                             "iommu-spapr",
+                             (uint64_t)tcet->nb_table << tcet->page_shift);
 
     QLIST_INSERT_HEAD(&spapr_tce_tables, tcet, list);
 
@@ -192,17 +204,11 @@ MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet)
     return &tcet->iommu;
 }
 
-void spapr_tce_set_bypass(sPAPRTCETable *tcet, bool bypass)
-{
-    tcet->bypass = bypass;
-}
-
 static void spapr_tce_reset(DeviceState *dev)
 {
     sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev);
     size_t table_size = tcet->nb_table * sizeof(uint64_t);
 
-    tcet->bypass = false;
     memset(tcet->table, 0, table_size);
 }
 
diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c
index 032ee1a..245cdd7 100644
--- a/hw/ppc/spapr_vio.c
+++ b/hw/ppc/spapr_vio.c
@@ -322,6 +322,18 @@ static void spapr_vio_quiesce_one(VIOsPAPRDevice *dev)
     free_crq(dev);
 }
 
+void spapr_vio_set_bypass(VIOsPAPRDevice *dev, bool bypass)
+{
+    if (!dev->tcet) {
+        return;
+    }
+
+    memory_region_set_enabled(&dev->mrbypass, bypass);
+    memory_region_set_enabled(spapr_tce_get_iommu(dev->tcet), !bypass);
+
+    dev->tcet->bypass = bypass;
+}
+
 static void rtas_set_tce_bypass(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                                 uint32_t token,
                                 uint32_t nargs, target_ulong args,
@@ -348,7 +360,7 @@ static void rtas_set_tce_bypass(PowerPCCPU *cpu, sPAPREnvironment *spapr,
         return;
     }
 
-    spapr_tce_set_bypass(dev->tcet, !!enable);
+    spapr_vio_set_bypass(dev, !!enable);
 
     rtas_st(rets, 0, RTAS_OUT_SUCCESS);
 }
@@ -407,6 +419,7 @@ static void spapr_vio_busdev_reset(DeviceState *qdev)
 
     dev->signal_state = 0;
 
+    spapr_vio_set_bypass(dev, false);
     if (pc->reset) {
         pc->reset(dev);
     }
@@ -456,12 +469,23 @@ static int spapr_vio_busdev_init(DeviceState *qdev)
 
     if (pc->rtce_window_size) {
         uint32_t liobn = SPAPR_VIO_BASE_LIOBN | dev->reg;
+
+        memory_region_init(&dev->mrroot, OBJECT(dev), "iommu-spapr-root",
+                           ram_size);
+        memory_region_init_alias(&dev->mrbypass, OBJECT(dev),
+                                 "iommu-spapr-bypass", get_system_memory(),
+                                 0, ram_size);
+        memory_region_add_subregion_overlap(&dev->mrroot, 0, &dev->mrbypass, 1);
+        address_space_init(&dev->as, &dev->mrroot, qdev->id);
+
         dev->tcet = spapr_tce_new_table(qdev, liobn,
                                         0,
                                         SPAPR_TCE_PAGE_SHIFT,
                                         pc->rtce_window_size >>
                                         SPAPR_TCE_PAGE_SHIFT, false);
-        address_space_init(&dev->as, spapr_tce_get_iommu(dev->tcet), qdev->id);
+        dev->tcet->vdev = dev;
+        memory_region_add_subregion_overlap(&dev->mrroot, 0,
+                                            spapr_tce_get_iommu(dev->tcet), 2);
     }
 
     return pc->init(dev);
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 716bff4..642cdc3 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -463,6 +463,7 @@ struct sPAPRTCETable {
     bool vfio_accel;
     int fd;
     MemoryRegion iommu;
+    struct VIOsPAPRDevice *vdev; /* for @bypass migration compatibility only */
     QLIST_ENTRY(sPAPRTCETable) list;
 };
 
@@ -475,7 +476,6 @@ sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn,
                                    uint32_t nb_table,
                                    bool vfio_accel);
 MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet);
-void spapr_tce_set_bypass(sPAPRTCETable *tcet, bool bypass);
 int spapr_dma_dt(void *fdt, int node_off, const char *propname,
                  uint32_t liobn, uint64_t window, uint32_t size);
 int spapr_tcet_dma_dt(void *fdt, int node_off, const char *propname,
diff --git a/include/hw/ppc/spapr_vio.h b/include/hw/ppc/spapr_vio.h
index 46edc2a..222397d 100644
--- a/include/hw/ppc/spapr_vio.h
+++ b/include/hw/ppc/spapr_vio.h
@@ -64,6 +64,8 @@ struct VIOsPAPRDevice {
     target_ulong signal_state;
     VIOsPAPR_CRQ crq;
     AddressSpace as;
+    MemoryRegion mrroot;
+    MemoryRegion mrbypass;
     sPAPRTCETable *tcet;
 };
 
@@ -139,4 +141,6 @@ extern const VMStateDescription vmstate_spapr_vio;
 #define VMSTATE_SPAPR_VIO(_f, _s) \
     VMSTATE_STRUCT(_f, _s, 0, vmstate_spapr_vio, VIOsPAPRDevice)
 
+void spapr_vio_set_bypass(VIOsPAPRDevice *dev, bool bypass);
+
 #endif /* _HW_SPAPR_VIO_H */
-- 
1.8.1.4

  reply	other threads:[~2015-03-08  8:45 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-08  8:44 [Qemu-devel] [PULL 2.3 00/38] ppc patch queue 2015-03-08 Alexander Graf
2015-03-08  8:44 ` Alexander Graf [this message]
2015-03-08  8:44 ` [Qemu-devel] [PULL 02/38] target-ppc: Use right page size with hash table lookup Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 03/38] pseries: Limit PCI host bridge "index" value Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 04/38] spapr: Add pseries-2.3 machine Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 05/38] spapr-pci: Enable huge BARs Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 06/38] Generalize QOM publishing of date and time from mc146818rtc.c Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 07/38] Add more VMSTATE_*_TEST variants for integers Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 08/38] pseries: Move sPAPR RTC code into its own file Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 09/38] pseries: Add more parameter validation in RTAS time of day functions Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 10/38] pseries: Add spapr_rtc_read() helper function Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 11/38] pseries: Make RTAS time of day functions respect -rtc options Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 12/38] pseries: Make the PAPR RTC a qdev device Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 13/38] pseries: Move rtc_offset into RTC device's state structure Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 14/38] pseries: Export RTC time via QOM Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 15/38] PPC: Clean up misuse of qdev_init() in kvm-openpic creation Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 16/38] spapr: Clean up misuse of qdev_init() in xics-kvm creation Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 17/38] vga: Expose framebuffer byteorder as a QOM property Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 18/38] pseries: Switch VGA endian on H_SET_MODE Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 19/38] Openpic: check that cpu id is within the number of cpus Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 20/38] display cpu id dump state Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 21/38] macio.c: include parent PCIDevice state in VMStateDescription Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 22/38] adb.c: include ADBDevice parent state in KBDState and MouseState Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 23/38] cuda.c: include adb_poll_timer in VMStateDescription Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 24/38] target-ppc: move sdr1 value change detection logic to helper_store_sdr1() Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 25/38] target-ppc: force update of msr bits in cpu_post_load Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 26/38] openpic: fix segfault on -M mac99 savevm Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 27/38] openpic: fix up loadvm under -M mac99 Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 28/38] openpic: switch IRQQueue queue from inline to bitmap Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 29/38] openpic: convert to vmstate Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 30/38] spapr_vio: Convert to realize() Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 31/38] Revert "default-configs/ppc64: add all components of i82378 SuperIO chip used by prep" Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 32/38] ppc64-softmmu: Remove unsupported FDC from config Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 33/38] ppc64-softmmu: Remove duplicated OPENPIC " Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 34/38] PPC: Remove duplicate OPENPIC defines in default-configs Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 35/38] PPC: Introduce the Virtual Time Base (VTB) SPR register Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 36/38] target-ppc: Add versions to server CPU descriptions Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 37/38] sPAPR: Implement EEH RTAS calls Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 38/38] sPAPR: Implement sPAPRPHBClass EEH callbacks Alexander Graf
2015-03-09  9:13 ` [Qemu-devel] [PULL 2.3 00/38] ppc patch queue 2015-03-08 Peter Maydell
2015-03-09 12:30   ` Alexander Graf
2015-03-09 13:16     ` Peter Maydell
2015-03-09 14:02       ` Alexander Graf
2015-03-09 15:14         ` Peter Maydell

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