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From: Alexander Graf <agraf@suse.de>
To: qemu-ppc@nongnu.org
Cc: peter.maydell@linaro.org, qemu-devel@nongnu.org,
	Gavin Shan <gwshan@linux.vnet.ibm.com>
Subject: [Qemu-devel] [PULL 38/38] sPAPR: Implement sPAPRPHBClass EEH callbacks
Date: Sun,  8 Mar 2015 09:44:57 +0100	[thread overview]
Message-ID: <1425804297-53727-39-git-send-email-agraf@suse.de> (raw)
In-Reply-To: <1425804297-53727-1-git-send-email-agraf@suse.de>

From: Gavin Shan <gwshan@linux.vnet.ibm.com>

The patch implements sPAPRPHBClass EEH callbacks so that the EEH
RTAS requests can be routed to VFIO for further handling.

Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
---
 hw/ppc/spapr_pci_vfio.c | 115 ++++++++++++++++++++++++++++++++++++++++++++++++
 hw/vfio/common.c        |   1 +
 2 files changed, 116 insertions(+)

diff --git a/hw/ppc/spapr_pci_vfio.c b/hw/ppc/spapr_pci_vfio.c
index 144912b..99a1be5 100644
--- a/hw/ppc/spapr_pci_vfio.c
+++ b/hw/ppc/spapr_pci_vfio.c
@@ -76,6 +76,117 @@ static void spapr_phb_vfio_reset(DeviceState *qdev)
     /* Do nothing */
 }
 
+static int spapr_phb_vfio_eeh_set_option(sPAPRPHBState *sphb,
+                                         unsigned int addr, int option)
+{
+    sPAPRPHBVFIOState *svphb = SPAPR_PCI_VFIO_HOST_BRIDGE(sphb);
+    struct vfio_eeh_pe_op op = { .argsz = sizeof(op) };
+    int ret;
+
+    switch (option) {
+    case RTAS_EEH_DISABLE:
+        op.op = VFIO_EEH_PE_DISABLE;
+        break;
+    case RTAS_EEH_ENABLE: {
+        PCIHostState *phb;
+        PCIDevice *pdev;
+
+        /*
+         * The EEH functionality is enabled on basis of PCI device,
+         * instead of PE. We need check the validity of the PCI
+         * device address.
+         */
+        phb = PCI_HOST_BRIDGE(sphb);
+        pdev = pci_find_device(phb->bus,
+                               (addr >> 16) & 0xFF, (addr >> 8) & 0xFF);
+        if (!pdev) {
+            return RTAS_OUT_PARAM_ERROR;
+        }
+
+        op.op = VFIO_EEH_PE_ENABLE;
+        break;
+    }
+    case RTAS_EEH_THAW_IO:
+        op.op = VFIO_EEH_PE_UNFREEZE_IO;
+        break;
+    case RTAS_EEH_THAW_DMA:
+        op.op = VFIO_EEH_PE_UNFREEZE_DMA;
+        break;
+    default:
+        return RTAS_OUT_PARAM_ERROR;
+    }
+
+    ret = vfio_container_ioctl(&svphb->phb.iommu_as, svphb->iommugroupid,
+                               VFIO_EEH_PE_OP, &op);
+    if (ret < 0) {
+        return RTAS_OUT_HW_ERROR;
+    }
+
+    return RTAS_OUT_SUCCESS;
+}
+
+static int spapr_phb_vfio_eeh_get_state(sPAPRPHBState *sphb, int *state)
+{
+    sPAPRPHBVFIOState *svphb = SPAPR_PCI_VFIO_HOST_BRIDGE(sphb);
+    struct vfio_eeh_pe_op op = { .argsz = sizeof(op) };
+    int ret;
+
+    op.op = VFIO_EEH_PE_GET_STATE;
+    ret = vfio_container_ioctl(&svphb->phb.iommu_as, svphb->iommugroupid,
+                               VFIO_EEH_PE_OP, &op);
+    if (ret < 0) {
+        return RTAS_OUT_PARAM_ERROR;
+    }
+
+    *state = ret;
+    return RTAS_OUT_SUCCESS;
+}
+
+static int spapr_phb_vfio_eeh_reset(sPAPRPHBState *sphb, int option)
+{
+    sPAPRPHBVFIOState *svphb = SPAPR_PCI_VFIO_HOST_BRIDGE(sphb);
+    struct vfio_eeh_pe_op op = { .argsz = sizeof(op) };
+    int ret;
+
+    switch (option) {
+    case RTAS_SLOT_RESET_DEACTIVATE:
+        op.op = VFIO_EEH_PE_RESET_DEACTIVATE;
+        break;
+    case RTAS_SLOT_RESET_HOT:
+        op.op = VFIO_EEH_PE_RESET_HOT;
+        break;
+    case RTAS_SLOT_RESET_FUNDAMENTAL:
+        op.op = VFIO_EEH_PE_RESET_FUNDAMENTAL;
+        break;
+    default:
+        return RTAS_OUT_PARAM_ERROR;
+    }
+
+    ret = vfio_container_ioctl(&svphb->phb.iommu_as, svphb->iommugroupid,
+                               VFIO_EEH_PE_OP, &op);
+    if (ret < 0) {
+        return RTAS_OUT_HW_ERROR;
+    }
+
+    return RTAS_OUT_SUCCESS;
+}
+
+static int spapr_phb_vfio_eeh_configure(sPAPRPHBState *sphb)
+{
+    sPAPRPHBVFIOState *svphb = SPAPR_PCI_VFIO_HOST_BRIDGE(sphb);
+    struct vfio_eeh_pe_op op = { .argsz = sizeof(op) };
+    int ret;
+
+    op.op = VFIO_EEH_PE_CONFIGURE;
+    ret = vfio_container_ioctl(&svphb->phb.iommu_as, svphb->iommugroupid,
+                               VFIO_EEH_PE_OP, &op);
+    if (ret < 0) {
+        return RTAS_OUT_PARAM_ERROR;
+    }
+
+    return RTAS_OUT_SUCCESS;
+}
+
 static void spapr_phb_vfio_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
@@ -84,6 +195,10 @@ static void spapr_phb_vfio_class_init(ObjectClass *klass, void *data)
     dc->props = spapr_phb_vfio_properties;
     dc->reset = spapr_phb_vfio_reset;
     spc->finish_realize = spapr_phb_vfio_finish_realize;
+    spc->eeh_set_option = spapr_phb_vfio_eeh_set_option;
+    spc->eeh_get_state = spapr_phb_vfio_eeh_get_state;
+    spc->eeh_reset = spapr_phb_vfio_eeh_reset;
+    spc->eeh_configure = spapr_phb_vfio_eeh_configure;
 }
 
 static const TypeInfo spapr_phb_vfio_info = {
diff --git a/hw/vfio/common.c b/hw/vfio/common.c
index 9db7d8d..148eb53 100644
--- a/hw/vfio/common.c
+++ b/hw/vfio/common.c
@@ -949,6 +949,7 @@ int vfio_container_ioctl(AddressSpace *as, int32_t groupid,
     switch (req) {
     case VFIO_CHECK_EXTENSION:
     case VFIO_IOMMU_SPAPR_TCE_GET_INFO:
+    case VFIO_EEH_PE_OP:
         break;
     default:
         /* Return an error on unknown requests */
-- 
1.8.1.4

  parent reply	other threads:[~2015-03-08  8:45 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-08  8:44 [Qemu-devel] [PULL 2.3 00/38] ppc patch queue 2015-03-08 Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 01/38] spapr_vio/spapr_iommu: Move VIO bypass where it belongs Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 02/38] target-ppc: Use right page size with hash table lookup Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 03/38] pseries: Limit PCI host bridge "index" value Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 04/38] spapr: Add pseries-2.3 machine Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 05/38] spapr-pci: Enable huge BARs Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 06/38] Generalize QOM publishing of date and time from mc146818rtc.c Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 07/38] Add more VMSTATE_*_TEST variants for integers Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 08/38] pseries: Move sPAPR RTC code into its own file Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 09/38] pseries: Add more parameter validation in RTAS time of day functions Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 10/38] pseries: Add spapr_rtc_read() helper function Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 11/38] pseries: Make RTAS time of day functions respect -rtc options Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 12/38] pseries: Make the PAPR RTC a qdev device Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 13/38] pseries: Move rtc_offset into RTC device's state structure Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 14/38] pseries: Export RTC time via QOM Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 15/38] PPC: Clean up misuse of qdev_init() in kvm-openpic creation Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 16/38] spapr: Clean up misuse of qdev_init() in xics-kvm creation Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 17/38] vga: Expose framebuffer byteorder as a QOM property Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 18/38] pseries: Switch VGA endian on H_SET_MODE Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 19/38] Openpic: check that cpu id is within the number of cpus Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 20/38] display cpu id dump state Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 21/38] macio.c: include parent PCIDevice state in VMStateDescription Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 22/38] adb.c: include ADBDevice parent state in KBDState and MouseState Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 23/38] cuda.c: include adb_poll_timer in VMStateDescription Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 24/38] target-ppc: move sdr1 value change detection logic to helper_store_sdr1() Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 25/38] target-ppc: force update of msr bits in cpu_post_load Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 26/38] openpic: fix segfault on -M mac99 savevm Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 27/38] openpic: fix up loadvm under -M mac99 Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 28/38] openpic: switch IRQQueue queue from inline to bitmap Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 29/38] openpic: convert to vmstate Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 30/38] spapr_vio: Convert to realize() Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 31/38] Revert "default-configs/ppc64: add all components of i82378 SuperIO chip used by prep" Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 32/38] ppc64-softmmu: Remove unsupported FDC from config Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 33/38] ppc64-softmmu: Remove duplicated OPENPIC " Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 34/38] PPC: Remove duplicate OPENPIC defines in default-configs Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 35/38] PPC: Introduce the Virtual Time Base (VTB) SPR register Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 36/38] target-ppc: Add versions to server CPU descriptions Alexander Graf
2015-03-08  8:44 ` [Qemu-devel] [PULL 37/38] sPAPR: Implement EEH RTAS calls Alexander Graf
2015-03-08  8:44 ` Alexander Graf [this message]
2015-03-09  9:13 ` [Qemu-devel] [PULL 2.3 00/38] ppc patch queue 2015-03-08 Peter Maydell
2015-03-09 12:30   ` Alexander Graf
2015-03-09 13:16     ` Peter Maydell
2015-03-09 14:02       ` Alexander Graf
2015-03-09 15:14         ` Peter Maydell

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