Re: [Qemu-devel] [RFC v4 0/9] pass aer error to guest for vfio device

[Alex Williamson <alex.williamson@redhat.com>]

On Mon, 2015-03-02 at 15:16 +0800, Chen Fan wrote:
> For now, for vfio pci passthough devices when qemu receives
> an error from host aer report, there just terminate the guest,
> but usually user want to know what error occurred but stop the
> guest, so this patches add aer capability support for vfio device,
> and pass the error to guest, and have guest driver to recover
> from the error.
> and turning on SERR# for error forwording in bridge control register
> patch in seabios has been merged.
> 
> v3-v4:
>    1. add 'x-aer' for user to off aer capability.
>    2. refactor vfio device to parse extended capabilities.
> 
> v2-v3:
>    1. refactor vfio device to parse extended capability.
>    2. add global property for piix4 to disable vfio aer cap.
> 
> v1-v2:
>    1. turn on SERR# for bridge control register in firmware.
>    2. initilize aer capability for vfio device.
>    3. fix some trivial bug.
> 
> Chen Fan (9):
>   pcie_aer: fix typos in pcie_aer_inject_error comment
>   aer: fix a wrong init PCI_ERR_COR_STATUS w1cmask type register
>   vfio: add pcie extanded capability support
>   aer: impove pcie_aer_init to support vfio device
>   vfio: add aer support for vfio device
>   vfio: add 'x-aer' option to disable aer capability
>   pcie_aer: expose pcie_aer_msg() interface
>   vfio-pci: pass the aer error to guest
>   pcie: fix several trivial typos
> 
>  hw/pci-bridge/ioh3420.c            |   3 +-
>  hw/pci-bridge/xio3130_downstream.c |   3 +-
>  hw/pci-bridge/xio3130_upstream.c   |   3 +-
>  hw/pci/pcie_aer.c                  |  17 ++--
>  hw/vfio/pci.c                      | 160 +++++++++++++++++++++++++++++++++++--
>  include/hw/pci/pci.h               |   2 +-
>  include/hw/pci/pcie_aer.h          |   7 +-
>  7 files changed, 174 insertions(+), 21 deletions(-)
> 

I would encourage you to submit any of the trivial typos and spelling
fixes separately, including them in a vfio series is only going to slow
down acceptance since it touches core-pci code, which I do not maintain.
Likewise we'll minimally need ACKs from MST for the PCI changes, but it
may be a wise move to send them separately with full justification as
well.  We're into the QEMU 2.3 freeze, so aside from trivial fixes, the
new functionality will need to wait until after 2.3 is tagged.  Thanks,

Alex