From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42158) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YVMAH-0006B7-Sz for qemu-devel@nongnu.org; Tue, 10 Mar 2015 11:33:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YVMAA-0008Qg-Pi for qemu-devel@nongnu.org; Tue, 10 Mar 2015 11:33:49 -0400 From: Marcel Apfelbaum Date: Tue, 10 Mar 2015 17:31:56 +0200 Message-Id: <1426001534-7151-11-git-send-email-marcel@redhat.com> In-Reply-To: <1426001534-7151-1-git-send-email-marcel@redhat.com> References: <1426001534-7151-1-git-send-email-marcel@redhat.com> Subject: [Qemu-devel] [PATCH v5 for-2.3 10/28] hw/acpi: add support for multiple root busses List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: seabios@seabios.org, kraxel@redhat.com, mst@redhat.com, quintela@redhat.com, agraf@suse.de, marcel@redhat.com, alex.williamson@redhat.com, kevin@koconnor.net, qemu-ppc@nongnu.org, hare@suse.de, imammedo@redhat.com, amit.shah@redhat.com, pbonzini@redhat.com, leon.alrae@imgtec.com, aurelien@aurel32.net, rth@twiddle.net If the machine has several root busses, we need to add them to acpi in order to be properly detected by guests. Signed-off-by: Marcel Apfelbaum --- hw/i386/acpi-build.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index d0a5c85..3e2701b 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -60,6 +60,8 @@ #include "qom/qom-qobject.h" #include "exec/ram_addr.h" +#include "qmp-commands.h" + /* These are used to size the ACPI tables for -M pc-i440fx-1.7 and * -M pc-i440fx-2.0. Even if the actual amount of AML generated grows * a little bit, there should be plenty of free space since the DSDT @@ -670,6 +672,36 @@ build_ssdt(GArray *table_data, GArray *linker, /* Reserve space for header */ acpi_data_push(ssdt->buf, sizeof(AcpiTableHeader)); + { + PciInfoList *info_list, *info; + Error *err = NULL; + + info_list = qmp_query_pci(&err); + if (err) { + error_free(err); + return; + } + + for (info = info_list; info; info = info->next) { + PciInfo *bus_info = info->value; + + if (bus_info->bus == 0) { + continue; + } + + scope = aml_scope("\\_SB"); + dev = aml_device("PC%.02X", (uint8_t)bus_info->bus); + aml_append(dev, aml_name_decl("_UID", + aml_string("PC%.02X", (uint8_t)bus_info->bus))); + aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A03"))); + aml_append(dev, + aml_name_decl("_BBN", aml_int((uint8_t)bus_info->bus))); + aml_append(scope, dev); + aml_append(ssdt, scope); + } + qapi_free_PciInfoList(info_list); + } + scope = aml_scope("\\_SB.PCI0"); /* build PCI0._CRS */ crs = aml_resource_template(); -- 2.1.0