From: James Hogan <james.hogan@imgtec.com>
To: qemu-devel@nongnu.org, Paolo Bonzini <pbonzini@redhat.com>
Cc: James Hogan <james.hogan@imgtec.com>,
	Leon Alrae <leon.alrae@imgtec.com>,
	Aurelien Jarno <aurelien@aurel32.net>,
	kvm@vger.kernel.org
Subject: [Qemu-devel] [PATCH 5/9] mips/kvm: Support unsigned KVM registers
Date: Wed, 11 Mar 2015 15:22:47 +0000	[thread overview]
Message-ID: <1426087371-16166-6-git-send-email-james.hogan@imgtec.com> (raw)
In-Reply-To: <1426087371-16166-1-git-send-email-james.hogan@imgtec.com>
Add KVM register access functions for the uint32_t type. This is
required for FP and MSA control registers, which are represented as
unsigned 32-bit integers.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Leon Alrae <leon.alrae@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
---
 target-mips/kvm.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)
diff --git a/target-mips/kvm.c b/target-mips/kvm.c
index b8813a2722a3..f4ee22f3e998 100644
--- a/target-mips/kvm.c
+++ b/target-mips/kvm.c
@@ -243,6 +243,18 @@ static inline int kvm_mips_put_one_reg(CPUState *cs, uint64_t reg_id,
     return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &cp0reg);
 }
 
+static inline int kvm_mips_put_one_ureg(CPUState *cs, uint64_t reg_id,
+                                        uint32_t *addr)
+{
+    uint64_t val64 = *addr;
+    struct kvm_one_reg cp0reg = {
+        .id = reg_id,
+        .addr = (uintptr_t)&val64
+    };
+
+    return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &cp0reg);
+}
+
 static inline int kvm_mips_put_one_ulreg(CPUState *cs, uint64_t reg_id,
                                          target_ulong *addr)
 {
@@ -283,6 +295,23 @@ static inline int kvm_mips_get_one_reg(CPUState *cs, uint64_t reg_id,
     return ret;
 }
 
+static inline int kvm_mips_get_one_ureg(CPUState *cs, uint64_t reg_id,
+                                        uint32_t *addr)
+{
+    int ret;
+    uint64_t val64 = 0;
+    struct kvm_one_reg cp0reg = {
+        .id = reg_id,
+        .addr = (uintptr_t)&val64
+    };
+
+    ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &cp0reg);
+    if (ret >= 0) {
+        *addr = val64;
+    }
+    return ret;
+}
+
 static inline int kvm_mips_get_one_ulreg(CPUState *cs, uint64 reg_id,
                                          target_ulong *addr)
 {
-- 
2.0.5
next prev parent reply	other threads:[~2015-03-11 15:23 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-11 15:22 [Qemu-devel] [PATCH 0/9] mips/kvm: Support FPU & SIMD (MSA) in MIPS KVM guests James Hogan
2015-03-11 15:22 ` [Qemu-devel] [PATCH 1/9] mips/kvm: Drop KVM_REG_MIPS_COUNT_* definitions James Hogan
2015-03-12 16:28   ` Leon Alrae
2015-03-11 15:22 ` [Qemu-devel] [PATCH 2/9] mips/kvm: Remove a couple of noisy DPRINTFs James Hogan
2015-03-12 16:29   ` Leon Alrae
2015-03-11 15:22 ` [Qemu-devel] [PATCH 3/9] mips/kvm: Implement PRid CP0 register James Hogan
2015-03-12 16:36   ` Leon Alrae
2015-03-11 15:22 ` [Qemu-devel] [PATCH 4/9] mips/kvm: Implement Config CP0 registers James Hogan
2015-03-12 16:41   ` Leon Alrae
2015-03-12 16:47     ` James Hogan
2015-03-11 15:22 ` James Hogan [this message]
2015-03-11 15:22 ` [Qemu-devel] [PATCH 6/9] mips/kvm: Support signed 64-bit KVM registers James Hogan
2015-03-11 15:22 ` [Qemu-devel] [PATCH 7/9] mips/kvm: Add FP & MSA register definitions James Hogan
2015-03-11 15:22 ` [Qemu-devel] [PATCH 8/9] mips/kvm: Support FPU in MIPS KVM guests James Hogan
2015-03-12 16:44   ` Paolo Bonzini
2015-03-12 17:00     ` James Hogan
2015-03-11 15:22 ` [Qemu-devel] [PATCH 9/9] mips/kvm: Support MSA " James Hogan
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