From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36576) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YW1uv-0003E5-7u for qemu-devel@nongnu.org; Thu, 12 Mar 2015 08:08:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YW1uu-0003R9-1h for qemu-devel@nongnu.org; Thu, 12 Mar 2015 08:08:45 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:55231) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YW1ut-0003QQ-RI for qemu-devel@nongnu.org; Thu, 12 Mar 2015 08:08:43 -0400 From: Peter Maydell Date: Thu, 12 Mar 2015 12:08:35 +0000 Message-Id: <1426162115-11064-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH] target-arm: Ignore low bit of PC in M-profile exception return List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Anders Esbensen , patches@linaro.org For the ARM M-profile cores, exception return pops various registers including the PC from the stack. The architecture defines that if the lowest bit in the new PC value is set (ie the PC is not halfword aligned) then behaviour is UNPREDICTABLE. In practice hardware implementations seem to simply ignore the low bit, and some buggy RTOSes incorrectly rely on this. QEMU's behaviour was architecturally permitted, but bringing QEMU into line with the hardware behaviour allows more guest code to run. We log the situation as a guest error. This was reported as LP:1428657. Reported-by: Anders Esbensen Signed-off-by: Peter Maydell --- Looking at debug logs this seems to do the right thing, but the test binary in LP:1428657 doesn't actually seem to do anything -- presumably it runs into some other issue further on in execution. target-arm/helper.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index 7fe3d14..10886c5 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -4334,6 +4334,16 @@ static void do_v7m_exception_exit(CPUARMState *env) env->regs[12] = v7m_pop(env); env->regs[14] = v7m_pop(env); env->regs[15] = v7m_pop(env); + if (env->regs[15] & 1) { + qemu_log_mask(LOG_GUEST_ERROR, + "M profile return from interrupt with misaligned " + "PC is UNPREDICTABLE\n"); + /* Actual hardware seems to ignore the lsbit, and there are several + * RTOSes out there which incorrectly assume the r15 in the stack + * frame should be a Thumb-style "lsbit indicates ARM/Thumb" value. + */ + env->regs[15] &= ~1U; + } xpsr = v7m_pop(env); xpsr_write(env, xpsr, 0xfffffdff); /* Undo stack alignment. */ -- 1.9.1