From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38643) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YWY4c-0001us-E4 for qemu-devel@nongnu.org; Fri, 13 Mar 2015 18:28:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YWY4X-0005GA-QU for qemu-devel@nongnu.org; Fri, 13 Mar 2015 18:28:54 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46396) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YWY4X-0005G0-Ij for qemu-devel@nongnu.org; Fri, 13 Mar 2015 18:28:49 -0400 Message-ID: <1426285724.3643.139.camel@redhat.com> From: Alex Williamson Date: Fri, 13 Mar 2015 16:28:44 -0600 In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v5 3/7] vfio: add aer support for vfio device List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Chen Fan Cc: izumi.taku@jp.fujitsu.com, qemu-devel@nongnu.org On Thu, 2015-03-12 at 18:23 +0800, Chen Fan wrote: > Calling pcie_aer_init to initilize aer related registers for > vfio device, then reload physical related registers to expose > device capability. > > Signed-off-by: Chen Fan > --- > hw/vfio/pci.c | 45 ++++++++++++++++++++++++++++++++++++++++++++- > 1 file changed, 44 insertions(+), 1 deletion(-) > > diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c > index 2190102..0a515b6 100644 > --- a/hw/vfio/pci.c > +++ b/hw/vfio/pci.c > @@ -2724,12 +2724,43 @@ static int vfio_add_std_cap(VFIOPCIDevice *vdev, uint8_t pos) > return 0; > } > > +static int vfio_setup_aer(VFIOPCIDevice *vdev, int pos, uint16_t size) > +{ > + PCIDevice *pdev = &vdev->pdev; > + uint8_t *exp_cap = pdev->config + pdev->exp.exp_cap; > + uint32_t severity, errcap; > + int ret; > + > + errcap = vfio_pci_read_config(pdev, pdev->exp.aer_cap + PCI_ERR_CAP, 4); > + /* The ability to record multiple headers is depending on > + the state of the Multiple Header Recording Capable bit and > + enabled by the Multiple Header Recording Enable bit */ Please follow the existing comment style in this file > + if ((errcap & PCI_ERR_CAP_MHRC) && > + (errcap & PCI_ERR_CAP_MHRE)) { > + pdev->exp.aer_log.log_max = PCIE_AER_LOG_MAX_DEFAULT; > + } else { > + pdev->exp.aer_log.log_max = 0; > + } > + ret = pcie_aer_init(pdev, pos, size); > + if (ret) { > + return ret; > + } > + > + /* load physical registers */ > + severity = vfio_pci_read_config(pdev, > + pdev->exp.aer_cap + PCI_ERR_UNCOR_SEVER, 4); > + pci_long_test_and_clear_mask(exp_cap + PCI_ERR_UNCOR_SEVER, ~severity); > + > + return 0; > +} > + > static int vfio_add_ext_cap(VFIOPCIDevice *vdev, const uint8_t *config) > { > PCIDevice *pdev = &vdev->pdev; > uint32_t header; > uint16_t cap_id, next, size; > uint8_t cap_ver; > + int ret = 0; > > for (next = PCI_CONFIG_SPACE_SIZE; next; > next = PCI_EXT_CAP_NEXT(pci_get_long(config + next))) { > @@ -2745,7 +2776,19 @@ static int vfio_add_ext_cap(VFIOPCIDevice *vdev, const uint8_t *config) > */ > size = vfio_ext_cap_max_size(config, next); > > - pcie_add_capability(pdev, cap_id, cap_ver, next, size); > + switch (cap_id) { > + case PCI_EXT_CAP_ID_ERR: > + ret = vfio_setup_aer(vdev, next, size); > + break; > + default: > + pcie_add_capability(pdev, cap_id, cap_ver, next, size); > + break; > + } > + > + if (ret) { > + return ret; > + } > + > if (next == PCI_CONFIG_SPACE_SIZE) { > /* Begin the rebuild, we should set the next offset zero. */ > pci_set_long(pdev->config + next, PCI_EXT_CAP(cap_id, cap_ver, 0));