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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 7/7] linux-user: Access correct register for get/set_tls syscalls on ARM TZ CPUs
Date: Mon, 16 Mar 2015 12:40:18 +0000	[thread overview]
Message-ID: <1426509618-27416-8-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1426509618-27416-1-git-send-email-peter.maydell@linaro.org>

From: Mikhail Ilyin <m.ilin@samsung.com>

When support was added for TrustZone to ARM CPU emulation, we failed
to correctly update the support for the linux-user implementation of
the get/set_tls syscalls. This meant that accesses to the TPIDRURO
register via the syscalls were always using the non-secure copy of
the register even if native MRC/MCR accesses were using the secure
register. This inconsistency caused most binaries to segfault on startup
if the CPU type was explicitly set to one of the TZ-enabled ones like
cortex-a15. (The default "any" CPU doesn't have TZ enabled and so is
not affected.)

Use access_secure_reg() to determine whether we should be using
the secure or the nonsecure copy of TPIDRURO when emulating these
syscalls.

Signed-off-by: Mikhail Ilyin <m.ilin@samsung.com>
Message-id: 1426505198-2411-1-git-send-email-m.ilin@samsung.com
[PMM: rewrote commit message to more clearly explain the issue
 and its consequences.]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 linux-user/arm/target_cpu.h | 15 ++++++++++++++-
 linux-user/main.c           |  2 +-
 2 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/linux-user/arm/target_cpu.h b/linux-user/arm/target_cpu.h
index d8a534d..6832262 100644
--- a/linux-user/arm/target_cpu.h
+++ b/linux-user/arm/target_cpu.h
@@ -29,7 +29,20 @@ static inline void cpu_clone_regs(CPUARMState *env, target_ulong newsp)
 
 static inline void cpu_set_tls(CPUARMState *env, target_ulong newtls)
 {
-    env->cp15.tpidrro_el[0] = newtls;
+    if (access_secure_reg(env)) {
+        env->cp15.tpidruro_s = newtls;
+    } else {
+        env->cp15.tpidrro_el[0] = newtls;
+    }
+}
+
+static inline target_ulong cpu_get_tls(CPUARMState *env)
+{
+    if (access_secure_reg(env)) {
+        return env->cp15.tpidruro_s;
+    } else {
+        return env->cp15.tpidrro_el[0];
+    }
 }
 
 #endif
diff --git a/linux-user/main.c b/linux-user/main.c
index 6bd23af..6e446de 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -566,7 +566,7 @@ do_kernel_trap(CPUARMState *env)
         end_exclusive();
         break;
     case 0xffff0fe0: /* __kernel_get_tls */
-        env->regs[0] = env->cp15.tpidrro_el[0];
+        env->regs[0] = cpu_get_tls(env);
         break;
     case 0xffff0f60: /* __kernel_cmpxchg64 */
         arm_kernel_cmpxchg64_helper(env);
-- 
1.9.1

  parent reply	other threads:[~2015-03-16 12:40 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-16 12:40 [Qemu-devel] [PULL 0/7] target-arm queue Peter Maydell
2015-03-16 12:40 ` [Qemu-devel] [PULL 1/7] target-arm: convert check_ap to ap_to_rw_prot Peter Maydell
2015-03-16 12:40 ` [Qemu-devel] [PULL 2/7] target-arm: fix get_phys_addr_v6/SCTLR_AFE access check Peter Maydell
2015-03-16 12:40 ` [Qemu-devel] [PULL 3/7] target-arm: get_phys_addr_lpae: more xn control Peter Maydell
2015-03-16 12:40 ` [Qemu-devel] [PULL 4/7] hw/intc/arm_gic: Initialize the vgic in the realize function Peter Maydell
2015-03-16 12:40 ` [Qemu-devel] [PULL 5/7] target-arm: Fix handling of STM (user) with r15 in register list Peter Maydell
2015-03-16 12:40 ` [Qemu-devel] [PULL 6/7] target-arm: Ignore low bit of PC in M-profile exception return Peter Maydell
2015-03-16 12:40 ` Peter Maydell [this message]
2015-03-16 14:44 ` [Qemu-devel] [PULL 0/7] target-arm queue Peter Maydell

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