From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60408) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YXx1k-0001cw-Hc for qemu-devel@nongnu.org; Tue, 17 Mar 2015 15:19:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YXx1j-00066b-Kc for qemu-devel@nongnu.org; Tue, 17 Mar 2015 15:19:44 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:55283) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YXx1j-00064E-E1 for qemu-devel@nongnu.org; Tue, 17 Mar 2015 15:19:43 -0400 From: Peter Maydell Date: Tue, 17 Mar 2015 19:19:35 +0000 Message-Id: <1426619975-2346-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH] target-arm: Store SPSR_EL1 state in banked_spsr[1] (SPSR_svc) List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Greg Bellows , =?UTF-8?q?Alex=20Benn=C3=A9e?= , kvmarm@lists.cs.columbia.edu, Christoffer Dall , patches@linaro.org The AArch64 SPSR_EL1 register is architecturally mandated to be mapped to the AArch32 SPSR_svc register. This means its state should live in QEMU's env->banked_spsr[1] field. Correct the buggy regdef that put it in banked_spsr[0] instead. Signed-off-by: Peter Maydell --- target-arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 10886c5..d77c6de 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2438,7 +2438,7 @@ static const ARMCPRegInfo v8_cp_reginfo[] = { { .name = "SPSR_EL1", .state = ARM_CP_STATE_AA64, .type = ARM_CP_ALIAS, .opc0 = 3, .opc1 = 0, .crn = 4, .crm = 0, .opc2 = 0, - .access = PL1_RW, .fieldoffset = offsetof(CPUARMState, banked_spsr[0]) }, + .access = PL1_RW, .fieldoffset = offsetof(CPUARMState, banked_spsr[1]) }, /* We rely on the access checks not allowing the guest to write to the * state field when SPSel indicates that it's being used as the stack * pointer. -- 1.9.1