From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45589) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YYDBe-0002Sz-DZ for qemu-devel@nongnu.org; Wed, 18 Mar 2015 08:35:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YYDBZ-00023b-Jj for qemu-devel@nongnu.org; Wed, 18 Mar 2015 08:35:02 -0400 Received: from mx1.redhat.com ([209.132.183.28]:50818) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YYDBZ-00022q-DO for qemu-devel@nongnu.org; Wed, 18 Mar 2015 08:34:57 -0400 Date: Wed, 18 Mar 2015 13:34:42 +0100 From: "Michael S. Tsirkin" Message-ID: <1426682025-20844-4-git-send-email-mst@redhat.com> References: <1426682025-20844-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1426682025-20844-1-git-send-email-mst@redhat.com> Subject: [Qemu-devel] [PULL 3/8] pcie: correct mistaken register bit for End-End TLP Prefix Blocking List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Chen Fan , Peter Maydell From: Chen Fan from pcie spec 7.8.17, the End-End TLP Prefix Blocking bit local is 15(e.g. 0x8000) in device control 2 register. Signed-off-by: Chen Fan Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/pci/pcie_regs.h | 2 +- hw/pci/pcie.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/hw/pci/pcie_regs.h b/include/hw/pci/pcie_regs.h index 652d9fc..848ab1c 100644 --- a/include/hw/pci/pcie_regs.h +++ b/include/hw/pci/pcie_regs.h @@ -72,7 +72,7 @@ #define PCI_EXP_DEVCAP2_EFF 0x100000 #define PCI_EXP_DEVCAP2_EETLPP 0x200000 -#define PCI_EXP_DEVCTL2_EETLPPB 0x80 +#define PCI_EXP_DEVCTL2_EETLPPB 0x8000 /* ARI */ #define PCI_ARI_VER 1 diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index 1abbbb1..1463e65 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -84,7 +84,7 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port) pci_set_long(exp_cap + PCI_EXP_DEVCAP2, PCI_EXP_DEVCAP2_EFF | PCI_EXP_DEVCAP2_EETLPP); - pci_set_word(dev->wmask + pos, PCI_EXP_DEVCTL2_EETLPPB); + pci_set_word(dev->wmask + pos + PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_EETLPPB); return pos; } -- MST