From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54928) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YYDhm-0006ZV-4l for qemu-devel@nongnu.org; Wed, 18 Mar 2015 09:08:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YYDhg-00062n-1m for qemu-devel@nongnu.org; Wed, 18 Mar 2015 09:08:14 -0400 From: Gerd Hoffmann Date: Wed, 18 Mar 2015 14:07:54 +0100 Message-Id: <1426684075-27224-13-git-send-email-kraxel@redhat.com> In-Reply-To: <1426684075-27224-1-git-send-email-kraxel@redhat.com> References: <1426684075-27224-1-git-send-email-kraxel@redhat.com> Subject: [Qemu-devel] [PULL 12/13] ohci: fix resource cleanup leak List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Gonglei , qemu-stable , Gerd Hoffmann From: Gonglei When hot-unplugging the usb controllers (ehci/uhci), we have to clean all resouce of these devices, involved registered reset handler. Otherwise, it may cause NULL pointer access and/or segmentation fault if we reboot the guest os after hot-unplugging. Let's hook up reset via DeviceClass->reset() and drop the qemu_register_reset() call. Then Qemu will register and unregister the reset handler automatically. Ohci does't support hotplugging/hotunplugging yet, but existing resource cleanup leak logic likes ehci/uhci. Cc: qemu-stable Signed-off-by: Gonglei --- hw/usb/hcd-ohci.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c index e180a17..1a22c9c 100644 --- a/hw/usb/hcd-ohci.c +++ b/hw/usb/hcd-ohci.c @@ -1883,7 +1883,6 @@ static void usb_ohci_init(OHCIState *ohci, DeviceState *dev, usb_packet_init(&ohci->usb_packet); ohci->async_td = 0; - qemu_register_reset(ohci_reset, ohci); } #define TYPE_PCI_OHCI "pci-ohci" @@ -1955,6 +1954,15 @@ static void usb_ohci_exit(PCIDevice *dev) } } +static void usb_ohci_reset_pci(DeviceState *d) +{ + PCIDevice *dev = PCI_DEVICE(d); + OHCIPCIState *ohci = PCI_OHCI(dev); + OHCIState *s = &ohci->state; + + ohci_reset(s); +} + #define TYPE_SYSBUS_OHCI "sysbus-ohci" #define SYSBUS_OHCI(obj) OBJECT_CHECK(OHCISysBusState, (obj), TYPE_SYSBUS_OHCI) @@ -1980,6 +1988,14 @@ static void ohci_realize_pxa(DeviceState *dev, Error **errp) sysbus_init_mmio(sbd, &s->ohci.mem); } +static void usb_ohci_reset_sysbus(DeviceState *dev) +{ + OHCISysBusState *s = SYSBUS_OHCI(dev); + OHCIState *ohci = &s->ohci; + + ohci_reset(ohci); +} + static Property ohci_pci_properties[] = { DEFINE_PROP_STRING("masterbus", OHCIPCIState, masterbus), DEFINE_PROP_UINT32("num-ports", OHCIPCIState, num_ports, 3), @@ -2101,6 +2117,7 @@ static void ohci_pci_class_init(ObjectClass *klass, void *data) dc->props = ohci_pci_properties; dc->hotpluggable = false; dc->vmsd = &vmstate_ohci; + dc->reset = usb_ohci_reset_pci; } static const TypeInfo ohci_pci_info = { @@ -2124,6 +2141,7 @@ static void ohci_sysbus_class_init(ObjectClass *klass, void *data) set_bit(DEVICE_CATEGORY_USB, dc->categories); dc->desc = "OHCI USB Controller"; dc->props = ohci_sysbus_properties; + dc->reset = usb_ohci_reset_sysbus; } static const TypeInfo ohci_sysbus_info = { -- 1.8.3.1