From: Leon Alrae <leon.alrae@imgtec.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 2/3] target-mips: fix hflags modified in delay / forbidden slot
Date: Wed, 18 Mar 2015 14:37:32 +0000 [thread overview]
Message-ID: <1426689453-9347-3-git-send-email-leon.alrae@imgtec.com> (raw)
In-Reply-To: <1426689453-9347-1-git-send-email-leon.alrae@imgtec.com>
All instructions which may change hflags terminate tb. However, this doesn't
work if such an instruction is placed in delay or forbidden slot.
gen_branch() clears MIPS_HFLAG_BMASK in ctx->hflags and then generates code
to overwrite hflags with ctx->hflags, consequently we loose any execution-time
hflags modifications. For example, in the following scenario hflag related to
Status.CU1 will not be updated:
/* Set Status.CU1 in delay slot */
mfc0 $24, $12, 0
lui $25, 0x2000
or $25, $25, $24
b check_Status_CU1
mtc0 $25, $12, 0
With this change we clear MIPS_HFLAG_BMASK in execution-time hflags if
instruction in delay or forbidden slot wants to terminate tb for some reason
(i.e. ctx->bstate != BS_NONE).
Also, die early and loudly if "unknown branch" is encountered as this should
never happen.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
target-mips/translate.c | 19 +++++++++++++++----
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 0e2443a..a91e503 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -10531,14 +10531,25 @@ static void gen_rdhwr(DisasContext *ctx, int rt, int rd)
tcg_temp_free(t0);
}
+static inline void clear_branch_hflags(DisasContext *ctx)
+{
+ ctx->hflags &= ~MIPS_HFLAG_BMASK;
+ if (ctx->bstate == BS_NONE) {
+ save_cpu_state(ctx, 0);
+ } else {
+ /* it is not safe to save ctx->hflags as hflags may be changed
+ in execution time by the instruction in delay / forbidden slot. */
+ tcg_gen_andi_i32(hflags, hflags, ~MIPS_HFLAG_BMASK);
+ }
+}
+
static void gen_branch(DisasContext *ctx, int insn_bytes)
{
if (ctx->hflags & MIPS_HFLAG_BMASK) {
int proc_hflags = ctx->hflags & MIPS_HFLAG_BMASK;
/* Branches completion */
- ctx->hflags &= ~MIPS_HFLAG_BMASK;
+ clear_branch_hflags(ctx);
ctx->bstate = BS_BRANCH;
- save_cpu_state(ctx, 0);
/* FIXME: Need to clear can_do_io. */
switch (proc_hflags & MIPS_HFLAG_BMASK_BASE) {
case MIPS_HFLAG_FBNSLOT:
@@ -10596,8 +10607,8 @@ static void gen_branch(DisasContext *ctx, int insn_bytes)
tcg_gen_exit_tb(0);
break;
default:
- MIPS_DEBUG("unknown branch");
- break;
+ fprintf(stderr, "unknown branch 0x%x\n", proc_hflags);
+ abort();
}
}
}
--
2.1.0
next prev parent reply other threads:[~2015-03-18 14:38 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-18 14:37 [Qemu-devel] [PULL 0/3] target-mips queue Leon Alrae
2015-03-18 14:37 ` [Qemu-devel] [PULL 1/3] target-mips: fix CP0.BadVAddr by stopping translation on Address Error Leon Alrae
2015-03-18 14:37 ` Leon Alrae [this message]
2015-03-18 14:37 ` [Qemu-devel] [PULL 3/3] target-mips: save cpu state before calling MSA load and store helpers Leon Alrae
2015-03-19 14:10 ` [Qemu-devel] [PULL 0/3] target-mips queue Peter Maydell
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