From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33477) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YaApu-0006NL-27 for qemu-devel@nongnu.org; Mon, 23 Mar 2015 18:28:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YaApm-0006q4-VU for qemu-devel@nongnu.org; Mon, 23 Mar 2015 18:28:42 -0400 Received: from mail-pa0-x231.google.com ([2607:f8b0:400e:c03::231]:36352) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YaApm-0006pv-OS for qemu-devel@nongnu.org; Mon, 23 Mar 2015 18:28:34 -0400 Received: by padcy3 with SMTP id cy3so204890756pad.3 for ; Mon, 23 Mar 2015 15:28:33 -0700 (PDT) From: James Sullivan Date: Mon, 23 Mar 2015 16:26:12 -0600 Message-Id: <1427149572-11378-1-git-send-email-sullivan.james.f@gmail.com> Subject: [Qemu-devel] [PATCH] apic: Implement low-priority arbitration for IRQ delivery List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: James Sullivan Currently, there is no arbitration among processors for low priority IRQ delivery. Implemented apic_get_arb_pri(), and added two new functions apic_compare_prio() and apic_lowest_prio() to support arbitration in apic_bus_deliver(). Signed-off-by: James Sullivan --- hw/intc/apic.c | 67 ++++++++++++++++++++++++++++++++++++++++++---------------- 1 file changed, 49 insertions(+), 18 deletions(-) diff --git a/hw/intc/apic.c b/hw/intc/apic.c index 0f97b47..47d2fb1 100644 --- a/hw/intc/apic.c +++ b/hw/intc/apic.c @@ -38,6 +38,7 @@ static void apic_set_irq(APICCommonState *s, int vector_num, int trigger_mode); static void apic_update_irq(APICCommonState *s); static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask, uint8_t dest, uint8_t dest_mode); +static int apic_get_arb_pri(APICCommonState *s); /* Find first bit starting from msb */ static int apic_fls_bit(uint32_t value) @@ -199,6 +200,29 @@ static void apic_external_nmi(APICCommonState *s) apic_local_deliver(s, APIC_LVT_LINT1); } +static int apic_compare_prio(struct APICCommonState *cpu1, + struct APICCommonState *cpu2) +{ + return apic_get_arb_pri(cpu1) - apic_get_arb_pri(cpu2); +} + +static struct APICCommonState *apic_lowest_prio(const uint32_t + *deliver_bitmask) +{ + APICCommonState *lowest = NULL; + int i, d; + + for (i = 0; i < MAX_APIC_WORDS; i++) { + if (deliver_bitmask[i]) { + d = i * 32 + apic_ffs_bit(deliver_bitmask[i]); + if (!lowest || apic_compare_prio(local_apics[d], lowest) < 0) { + lowest = local_apics[d]; + } + } + } + return lowest; +} + #define foreach_apic(apic, deliver_bitmask, code) \ {\ int __i, __j;\ @@ -225,22 +249,10 @@ static void apic_bus_deliver(const uint32_t *deliver_bitmask, switch (delivery_mode) { case APIC_DM_LOWPRI: - /* XXX: search for focus processor, arbitration */ - { - int i, d; - d = -1; - for(i = 0; i < MAX_APIC_WORDS; i++) { - if (deliver_bitmask[i]) { - d = i * 32 + apic_ffs_bit(deliver_bitmask[i]); - break; - } - } - if (d >= 0) { - apic_iter = local_apics[d]; - if (apic_iter) { - apic_set_irq(apic_iter, vector_num, trigger_mode); - } - } + /* XXX: search for focus processor */ + apic_iter = apic_lowest_prio(deliver_bitmask); + if (apic_iter) { + apic_set_irq(apic_iter , vector_num, trigger_mode); } return; @@ -336,8 +348,27 @@ static int apic_get_ppr(APICCommonState *s) static int apic_get_arb_pri(APICCommonState *s) { - /* XXX: arbitration */ - return 0; + int tpr, isrv, irrv, apr; + + tpr = apic_get_tpr(s); + isrv = get_highest_priority_int(s->isr); + if (isrv < 0) { + isrv = 0; + } + isrv >>= 4; + irrv = get_highest_priority_int(s->irr); + if (irrv < 0) { + irrv = 0; + } + irrv >>= 4; + + if ((tpr >= irrv) && (tpr > isrv)) { + apr = s->tpr & 0xff; + } else { + apr = ((tpr & isrv) > irrv) ? (tpr & isrv) : irrv; + apr <<= 4; + } + return apr; } -- 2.3.3