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From: James Sullivan <sullivan.james.f@gmail.com>
To: qemu-devel@nongnu.org
Cc: pbonzini@redhat.com, James Sullivan <sullivan.james.f@gmail.com>,
	mst@redhat.com
Subject: [Qemu-devel] [PATCH v2 2/5] apic: Implement low priority arbitration for IRQ delivery
Date: Tue, 24 Mar 2015 13:13:43 -0600	[thread overview]
Message-ID: <1427224426-9025-3-git-send-email-sullivan.james.f@gmail.com> (raw)
In-Reply-To: <1427224426-9025-1-git-send-email-sullivan.james.f@gmail.com>

Currently, there is no arbitration among processors for low priority IRQ
delivery. Added support for low priority arbitration to
apic_bus_deliver(), using the functions introduced in
[74c1222c5b579970fafdd6a8e919fbb2c88219c3] ("apic: Implement LAPIC low
priority arbitration functions").

Signed-off-by: James Sullivan <sullivan.james.f@gmail.com>
---
 hw/intc/apic.c | 20 ++++----------------
 1 file changed, 4 insertions(+), 16 deletions(-)

diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index b372513..47d2fb1 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -249,22 +249,10 @@ static void apic_bus_deliver(const uint32_t *deliver_bitmask,
 
     switch (delivery_mode) {
         case APIC_DM_LOWPRI:
-            /* XXX: search for focus processor, arbitration */
-            {
-                int i, d;
-                d = -1;
-                for(i = 0; i < MAX_APIC_WORDS; i++) {
-                    if (deliver_bitmask[i]) {
-                        d = i * 32 + apic_ffs_bit(deliver_bitmask[i]);
-                        break;
-                    }
-                }
-                if (d >= 0) {
-                    apic_iter = local_apics[d];
-                    if (apic_iter) {
-                        apic_set_irq(apic_iter, vector_num, trigger_mode);
-                    }
-                }
+            /* XXX: search for focus processor */
+            apic_iter = apic_lowest_prio(deliver_bitmask);
+            if (apic_iter) {
+                apic_set_irq(apic_iter , vector_num, trigger_mode);
             }
             return;
 
-- 
2.3.3

  parent reply	other threads:[~2015-03-24 19:16 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-24 19:13 [Qemu-devel] [PATCH v2 0/5] Implement RH bit handling and lowpri arbitration James Sullivan
2015-03-24 19:13 ` [Qemu-devel] [PATCH v3 2/5] apic: Implement LAPIC low priority arbitration functions James Sullivan
2015-03-24 19:13 ` James Sullivan [this message]
2015-03-24 19:13 ` [Qemu-devel] [PATCH v2 3/5] apic: Added helper function apic_match_dest, apic_match_[physical, logical]_dest James Sullivan
2015-03-24 19:13 ` [Qemu-devel] [PATCH v2 4/5] apic: Set and pass in RH bit for MSI interrupts James Sullivan
2015-03-24 19:13 ` [Qemu-devel] [PATCH v2 5/5] apic: Implement handling of RH=1 for MSI interrupt delivery James Sullivan

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