From: James Hogan <james.hogan@imgtec.com>
To: qemu-devel@nongnu.org, Paolo Bonzini <pbonzini@redhat.com>
Cc: James Hogan <james.hogan@imgtec.com>,
Leon Alrae <leon.alrae@imgtec.com>,
kvm@vger.kernel.org, Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH v2 2/9] mips/kvm: Sync with newer MIPS KVM headers
Date: Wed, 25 Mar 2015 10:23:47 +0000 [thread overview]
Message-ID: <1427279034-9459-3-git-send-email-james.hogan@imgtec.com> (raw)
In-Reply-To: <1427279034-9459-1-git-send-email-james.hogan@imgtec.com>
The KVM_REG_MIPS_COUNT_* definitions are now included in
linux-headers/asm-mips/kvm.h since commit b061808d39fa ("linux-headers:
update linux headers to kvm/next"), therefore the duplicate definitions
in target-mips/kvm.c can now be dropped.
The MIPS_C0_{32,64} macros are also updated to utilise definitions more
recently added to the asm-mips/kvm.h header.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Leon Alrae <leon.alrae@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
---
Changes in v2:
- Add the changes to MIPS_CP0_{32,64} macros from v1 patch 7, since the
rest of that patch is now unnecessary and the change is along the same
lines as this patch.
- (not added Leon's Reviewed-by due to above non-reviewed change).
---
target-mips/kvm.c | 15 ++-------------
1 file changed, 2 insertions(+), 13 deletions(-)
diff --git a/target-mips/kvm.c b/target-mips/kvm.c
index 4d1f7ead8142..bbdaccc9d729 100644
--- a/target-mips/kvm.c
+++ b/target-mips/kvm.c
@@ -206,10 +206,10 @@ int kvm_mips_set_ipi_interrupt(MIPSCPU *cpu, int irq, int level)
}
#define MIPS_CP0_32(_R, _S) \
- (KVM_REG_MIPS | KVM_REG_SIZE_U32 | 0x10000 | (8 * (_R) + (_S)))
+ (KVM_REG_MIPS_CP0 | KVM_REG_SIZE_U32 | (8 * (_R) + (_S)))
#define MIPS_CP0_64(_R, _S) \
- (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 0x10000 | (8 * (_R) + (_S)))
+ (KVM_REG_MIPS_CP0 | KVM_REG_SIZE_U64 | (8 * (_R) + (_S)))
#define KVM_REG_MIPS_CP0_INDEX MIPS_CP0_32(0, 0)
#define KVM_REG_MIPS_CP0_CONTEXT MIPS_CP0_64(4, 0)
@@ -226,17 +226,6 @@ int kvm_mips_set_ipi_interrupt(MIPSCPU *cpu, int irq, int level)
#define KVM_REG_MIPS_CP0_EPC MIPS_CP0_64(14, 0)
#define KVM_REG_MIPS_CP0_ERROREPC MIPS_CP0_64(30, 0)
-/* CP0_Count control */
-#define KVM_REG_MIPS_COUNT_CTL (KVM_REG_MIPS | KVM_REG_SIZE_U64 | \
- 0x20000 | 0)
-#define KVM_REG_MIPS_COUNT_CTL_DC 0x00000001 /* master disable */
-/* CP0_Count resume monotonic nanoseconds */
-#define KVM_REG_MIPS_COUNT_RESUME (KVM_REG_MIPS | KVM_REG_SIZE_U64 | \
- 0x20000 | 1)
-/* CP0_Count rate in Hz */
-#define KVM_REG_MIPS_COUNT_HZ (KVM_REG_MIPS | KVM_REG_SIZE_U64 | \
- 0x20000 | 2)
-
static inline int kvm_mips_put_one_reg(CPUState *cs, uint64_t reg_id,
int32_t *addr)
{
--
2.0.5
next prev parent reply other threads:[~2015-03-25 10:24 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-25 10:23 [Qemu-devel] [PATCH v2 0/9] mips/kvm: Support FPU & SIMD (MSA) in MIPS KVM guests James Hogan
2015-03-25 10:23 ` [Qemu-devel] [PATCH v2 1/9] DONT APPLY: linux-headers: Update MIPS KVM headers James Hogan
2015-03-25 10:23 ` James Hogan [this message]
2015-03-25 10:23 ` [Qemu-devel] [PATCH v2 3/9] mips/kvm: Remove a couple of noisy DPRINTFs James Hogan
2015-03-25 10:23 ` [Qemu-devel] [PATCH v2 4/9] mips/kvm: Implement PRid CP0 register James Hogan
2015-03-25 10:23 ` [Qemu-devel] [PATCH v2 5/9] mips/kvm: Implement Config CP0 registers James Hogan
2015-03-25 10:23 ` [Qemu-devel] [PATCH v2 6/9] mips/kvm: Support unsigned KVM registers James Hogan
2015-04-24 10:39 ` [Qemu-devel] [PATCH v3 " James Hogan
2015-03-25 10:23 ` [Qemu-devel] [PATCH v2 7/9] mips/kvm: Support signed 64-bit " James Hogan
2015-03-25 10:23 ` [Qemu-devel] [PATCH v2 8/9] mips/kvm: Support FPU in MIPS KVM guests James Hogan
2015-03-25 10:23 ` [Qemu-devel] [PATCH v2 9/9] mips/kvm: Support MSA " James Hogan
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