From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 06/14] megasas: use PCI DMA APIs
Date: Thu, 26 Mar 2015 17:02:26 +0100 [thread overview]
Message-ID: <1427385754-13012-7-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1427385754-13012-1-git-send-email-pbonzini@redhat.com>
It is wrong to use address_space_memory directly, because there could be an
IOMMU in the middle.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/scsi/megasas.c | 51 ++++++++++++++++++++++++---------------------------
1 file changed, 24 insertions(+), 27 deletions(-)
diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
index bf83b65..ad7317b 100644
--- a/hw/scsi/megasas.c
+++ b/hw/scsi/megasas.c
@@ -171,26 +171,29 @@ static bool megasas_is_jbod(MegasasState *s)
return s->flags & MEGASAS_MASK_USE_JBOD;
}
-static void megasas_frame_set_cmd_status(unsigned long frame, uint8_t v)
+static void megasas_frame_set_cmd_status(MegasasState *s,
+ unsigned long frame, uint8_t v)
{
- stb_phys(&address_space_memory,
- frame + offsetof(struct mfi_frame_header, cmd_status), v);
+ PCIDevice *pci = &s->parent_obj;
+ stb_pci_dma(pci, frame + offsetof(struct mfi_frame_header, cmd_status), v);
}
-static void megasas_frame_set_scsi_status(unsigned long frame, uint8_t v)
+static void megasas_frame_set_scsi_status(MegasasState *s,
+ unsigned long frame, uint8_t v)
{
- stb_phys(&address_space_memory,
- frame + offsetof(struct mfi_frame_header, scsi_status), v);
+ PCIDevice *pci = &s->parent_obj;
+ stb_pci_dma(pci, frame + offsetof(struct mfi_frame_header, scsi_status), v);
}
/*
* Context is considered opaque, but the HBA firmware is running
* in little endian mode. So convert it to little endian, too.
*/
-static uint64_t megasas_frame_get_context(unsigned long frame)
+static uint64_t megasas_frame_get_context(MegasasState *s,
+ unsigned long frame)
{
- return ldq_le_phys(&address_space_memory,
- frame + offsetof(struct mfi_frame_header, context));
+ PCIDevice *pci = &s->parent_obj;
+ return ldq_le_pci_dma(pci, frame + offsetof(struct mfi_frame_header, context));
}
static bool megasas_frame_is_ieee_sgl(MegasasCmd *cmd)
@@ -523,8 +526,7 @@ static MegasasCmd *megasas_enqueue_frame(MegasasState *s,
s->busy++;
if (s->consumer_pa) {
- s->reply_queue_tail = ldl_le_phys(&address_space_memory,
- s->consumer_pa);
+ s->reply_queue_tail = ldl_le_pci_dma(pcid, s->consumer_pa);
}
trace_megasas_qf_enqueue(cmd->index, cmd->count, cmd->context,
s->reply_queue_head, s->reply_queue_tail, s->busy);
@@ -547,29 +549,24 @@ static void megasas_complete_frame(MegasasState *s, uint64_t context)
*/
if (megasas_use_queue64(s)) {
queue_offset = s->reply_queue_head * sizeof(uint64_t);
- stq_le_phys(&address_space_memory,
- s->reply_queue_pa + queue_offset, context);
+ stq_le_pci_dma(pci_dev, s->reply_queue_pa + queue_offset, context);
} else {
queue_offset = s->reply_queue_head * sizeof(uint32_t);
- stl_le_phys(&address_space_memory,
- s->reply_queue_pa + queue_offset, context);
+ stl_le_pci_dma(pci_dev, s->reply_queue_pa + queue_offset, context);
}
- s->reply_queue_tail = ldl_le_phys(&address_space_memory,
- s->consumer_pa);
+ s->reply_queue_tail = ldl_le_pci_dma(pci_dev, s->consumer_pa);
trace_megasas_qf_complete(context, s->reply_queue_head,
s->reply_queue_tail, s->busy);
}
if (megasas_intr_enabled(s)) {
/* Update reply queue pointer */
- s->reply_queue_tail = ldl_le_phys(&address_space_memory,
- s->consumer_pa);
+ s->reply_queue_tail = ldl_le_pci_dma(pci_dev, s->consumer_pa);
tail = s->reply_queue_head;
s->reply_queue_head = megasas_next_index(s, tail, s->fw_cmds);
trace_megasas_qf_update(s->reply_queue_head, s->reply_queue_tail,
s->busy);
- stl_le_phys(&address_space_memory,
- s->producer_pa, s->reply_queue_head);
+ stl_le_pci_dma(pci_dev, s->producer_pa, s->reply_queue_head);
/* Notify HBA */
if (msix_enabled(pci_dev)) {
trace_megasas_msix_raise(0);
@@ -651,8 +648,8 @@ static int megasas_init_firmware(MegasasState *s, MegasasCmd *cmd)
pa_lo = le32_to_cpu(initq->pi_addr_lo);
pa_hi = le32_to_cpu(initq->pi_addr_hi);
s->producer_pa = ((uint64_t) pa_hi << 32) | pa_lo;
- s->reply_queue_head = ldl_le_phys(&address_space_memory, s->producer_pa);
- s->reply_queue_tail = ldl_le_phys(&address_space_memory, s->consumer_pa);
+ s->reply_queue_head = ldl_le_pci_dma(pcid, s->producer_pa);
+ s->reply_queue_tail = ldl_le_pci_dma(pcid, s->consumer_pa);
flags = le32_to_cpu(initq->flags);
if (flags & MFI_QUEUE_FLAG_CONTEXT64) {
s->flags |= MEGASAS_MASK_USE_QUEUE64;
@@ -1951,14 +1948,14 @@ static void megasas_handle_frame(MegasasState *s, uint64_t frame_addr,
* Always read 64bit context, top bits will be
* masked out if required in megasas_enqueue_frame()
*/
- frame_context = megasas_frame_get_context(frame_addr);
+ frame_context = megasas_frame_get_context(s, frame_addr);
cmd = megasas_enqueue_frame(s, frame_addr, frame_context, frame_count);
if (!cmd) {
/* reply queue full */
trace_megasas_frame_busy(frame_addr);
- megasas_frame_set_scsi_status(frame_addr, BUSY);
- megasas_frame_set_cmd_status(frame_addr, MFI_STAT_SCSI_DONE_WITH_ERROR);
+ megasas_frame_set_scsi_status(s, frame_addr, BUSY);
+ megasas_frame_set_cmd_status(s, frame_addr, MFI_STAT_SCSI_DONE_WITH_ERROR);
megasas_complete_frame(s, frame_context);
s->event_count++;
return;
@@ -1993,7 +1990,7 @@ static void megasas_handle_frame(MegasasState *s, uint64_t frame_addr,
if (cmd->frame) {
cmd->frame->header.cmd_status = frame_status;
} else {
- megasas_frame_set_cmd_status(frame_addr, frame_status);
+ megasas_frame_set_cmd_status(s, frame_addr, frame_status);
}
megasas_unmap_frame(s, cmd);
megasas_complete_frame(s, cmd->context);
--
2.3.3
next prev parent reply other threads:[~2015-03-26 16:02 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-26 16:02 [Qemu-devel] [PULL 00/14] Misc bugfixes for 2.3.0-rc2 Paolo Bonzini
2015-03-26 16:02 ` [Qemu-devel] [PULL 01/14] rcu tests: fix compilation on 32-bit ppc Paolo Bonzini
2015-03-26 16:02 ` [Qemu-devel] [PULL 02/14] fw_cfg: factor out initialization of FW_CFG_ID (rev. number) Paolo Bonzini
2015-03-26 16:02 ` [Qemu-devel] [PULL 03/14] i6300esb: Correct endiannness Paolo Bonzini
2015-03-26 16:02 ` [Qemu-devel] [PULL 04/14] i6300esb: Fix signed integer overflow Paolo Bonzini
2015-03-26 16:02 ` [Qemu-devel] [PULL 05/14] cpus: Don't kick un-realized cpus Paolo Bonzini
2015-03-26 16:02 ` Paolo Bonzini [this message]
2015-03-26 16:02 ` [Qemu-devel] [PULL 07/14] vmw_pvscsi: use PCI DMA APIs Paolo Bonzini
2015-03-26 16:02 ` [Qemu-devel] [PULL 08/14] nbd: Fix up comment after commit e140177 Paolo Bonzini
2015-03-26 16:02 ` [Qemu-devel] [PULL 09/14] m68k: memory: Replace memory_region_init_ram with memory_region_allocate_system_memory Paolo Bonzini
2015-03-26 16:02 ` [Qemu-devel] [PULL 10/14] mips: " Paolo Bonzini
2015-03-26 16:02 ` [Qemu-devel] [PULL 11/14] sparc: " Paolo Bonzini
2015-03-26 16:02 ` [Qemu-devel] [PULL 12/14] exec: avoid possible overwriting of mmaped area in qemu_ram_remap Paolo Bonzini
2015-03-26 16:02 ` [Qemu-devel] [PULL 13/14] misc: fix typos in copyright declaration Paolo Bonzini
2015-03-26 16:02 ` [Qemu-devel] [PULL 14/14] virtio-scsi-dataplane: fix memory leak for VirtIOSCSIVring Paolo Bonzini
2015-03-26 18:34 ` [Qemu-devel] [PULL 00/14] Misc bugfixes for 2.3.0-rc2 Peter Maydell
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