From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 6/8] hw/intc: arm_gic_kvm.c restore config first
Date: Wed, 1 Apr 2015 18:08:16 +0100 [thread overview]
Message-ID: <1427908098-11358-7-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1427908098-11358-1-git-send-email-peter.maydell@linaro.org>
From: Alex Bennée <alex.bennee@linaro.org>
As there is logic to deal with the difference between edge and level
triggered interrupts in the kernel we must ensure it knows the
configuration of the IRQs before we restore the pending state.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/intc/arm_gic_kvm.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c
index 0d20750..e1952ad 100644
--- a/hw/intc/arm_gic_kvm.c
+++ b/hw/intc/arm_gic_kvm.c
@@ -370,6 +370,11 @@ static void kvm_arm_gic_put(GICState *s)
* the appropriate CPU interfaces in the kernel) */
kvm_dist_put(s, 0x800, 8, s->num_irq, translate_targets);
+ /* irq_state[n].trigger -> GICD_ICFGRn
+ * (restore configuration registers before pending IRQs so we treat
+ * level/edge correctly) */
+ kvm_dist_put(s, 0xc00, 2, s->num_irq, translate_trigger);
+
/* irq_state[n].pending + irq_state[n].level -> GICD_ISPENDRn */
kvm_dist_put(s, 0x280, 1, s->num_irq, translate_clear);
kvm_dist_put(s, 0x200, 1, s->num_irq, translate_pending);
@@ -378,8 +383,6 @@ static void kvm_arm_gic_put(GICState *s)
kvm_dist_put(s, 0x380, 1, s->num_irq, translate_clear);
kvm_dist_put(s, 0x300, 1, s->num_irq, translate_active);
- /* irq_state[n].trigger -> GICD_ICFRn */
- kvm_dist_put(s, 0xc00, 2, s->num_irq, translate_trigger);
/* s->priorityX[irq] -> ICD_IPRIORITYRn */
kvm_dist_put(s, 0x400, 8, s->num_irq, translate_priority);
--
1.9.1
next prev parent reply other threads:[~2015-04-01 17:08 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-01 17:08 [Qemu-devel] [PULL 0/8] target-arm queue Peter Maydell
2015-04-01 17:08 ` [Qemu-devel] [PULL 1/8] hw/arm/highbank: Fix resource leak and wrong image loading Peter Maydell
2015-04-01 17:08 ` [Qemu-devel] [PULL 2/8] hw/arm/vexpress: Fix memory leak reported by Coverity Peter Maydell
2015-04-01 17:08 ` [Qemu-devel] [PULL 3/8] hw/arm/virt: " Peter Maydell
2015-04-01 17:08 ` [Qemu-devel] [PULL 4/8] target-arm: Store SPSR_EL1 state in banked_spsr[1] (SPSR_svc) Peter Maydell
2015-04-01 17:08 ` [Qemu-devel] [PULL 5/8] target-arm: kvm: save/restore mp state Peter Maydell
2015-04-01 17:08 ` Peter Maydell [this message]
2015-04-01 17:08 ` [Qemu-devel] [PULL 7/8] target-arm: kvm64 sync FP register state Peter Maydell
2015-04-01 17:08 ` [Qemu-devel] [PULL 8/8] target-arm: kvm64 fix save/restore of SPSR regs Peter Maydell
2015-04-01 18:05 ` [Qemu-devel] [PULL 0/8] target-arm queue Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1427908098-11358-7-git-send-email-peter.maydell@linaro.org \
--to=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).