* [Qemu-devel] [PATCH] openrisc: terminate qemu process upon receiving a halt signal.
@ 2015-04-02 16:13 Hesham ALMatary
0 siblings, 0 replies; 3+ messages in thread
From: Hesham ALMatary @ 2015-04-02 16:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Hesham ALMatary
or1ksim simulator currently handles "l.nop 0xC" instruction as a halt signal. Do
the same for QEMU.
Signed-off-by: Hesham ALMatary <heshamelmatary@gmail.com>
---
target-openrisc/translate.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index dc76789..b024f11 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -750,6 +750,11 @@ static void dec_misc(DisasContext *dc, uint32_t insn)
switch (op1) {
case 0x01: /* l.nop */
LOG_DIS("l.nop %d\n", I16);
+
+ if(I16 == 0xC) {
+ exit(0);
+ }
+
break;
default:
--
2.1.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [Qemu-devel] [PATCH] openrisc: terminate qemu process upon receiving a halt signal.
@ 2015-04-02 16:50 Hesham ALMatary
2015-04-03 20:41 ` Richard Henderson
0 siblings, 1 reply; 3+ messages in thread
From: Hesham ALMatary @ 2015-04-02 16:50 UTC (permalink / raw)
To: qemu-devel; +Cc: Hesham ALMatary
or1ksim simulator currently handles "l.nop 0xC" instruction as
a halt signal. Do the same for QEMU.
Signed-off-by: Hesham ALMatary <heshamelmatary@gmail.com>
---
target-openrisc/translate.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index dc76789..5fa8ede 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -750,6 +750,11 @@ static void dec_misc(DisasContext *dc, uint32_t insn)
switch (op1) {
case 0x01: /* l.nop */
LOG_DIS("l.nop %d\n", I16);
+
+ if(I16 == 0xC) {
+ exit(0);
+ }
+
break;
default:
--
2.1.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] [PATCH] openrisc: terminate qemu process upon receiving a halt signal.
2015-04-02 16:50 Hesham ALMatary
@ 2015-04-03 20:41 ` Richard Henderson
0 siblings, 0 replies; 3+ messages in thread
From: Richard Henderson @ 2015-04-03 20:41 UTC (permalink / raw)
To: Hesham ALMatary, qemu-devel
On 04/02/2015 09:50 AM, Hesham ALMatary wrote:
> or1ksim simulator currently handles "l.nop 0xC" instruction as
> a halt signal. Do the same for QEMU.
>
> Signed-off-by: Hesham ALMatary <heshamelmatary@gmail.com>
> ---
> target-openrisc/translate.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
> index dc76789..5fa8ede 100644
> --- a/target-openrisc/translate.c
> +++ b/target-openrisc/translate.c
> @@ -750,6 +750,11 @@ static void dec_misc(DisasContext *dc, uint32_t insn)
> switch (op1) {
> case 0x01: /* l.nop */
> LOG_DIS("l.nop %d\n", I16);
> +
> + if(I16 == 0xC) {
> + exit(0);
> + }
> +
Ug. IMO l.nop was a poor choice; l.trap would have been better.
But whatever...
Further:
(1) This is translation time, not execution time. You can't do
the exit here, only when the instruction is executed.
(2) This, and the other 10 things hidden under l_nop are
similar to the "-semihosting" switch available for arm,
lm32, m68k, and xtensa.
Although semihosting is typically even more complex,
generally implementing the exit/read/write/open/close/lseek/stat
families of syscalls.
r~
^ permalink raw reply [flat|nested] 3+ messages in thread
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