From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34845) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YfTwP-0003Li-J8 for qemu-devel@nongnu.org; Tue, 07 Apr 2015 09:53:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YfTwM-00015A-9H for qemu-devel@nongnu.org; Tue, 07 Apr 2015 09:53:21 -0400 Received: from mailhub.sw.ru ([195.214.232.25]:21864 helo=relay.sw.ru) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YfTwL-00014Z-KZ for qemu-devel@nongnu.org; Tue, 07 Apr 2015 09:53:17 -0400 From: "Denis V. Lunev" Date: Tue, 7 Apr 2015 16:53:52 +0300 Message-Id: <1428414832-3104-1-git-send-email-den@openvz.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 1/1] apic_common: improve readability of apic_reset_common List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Denis V. Lunev" , Paolo Bonzini , qemu-devel@nongnu.org, =?UTF-8?q?Andreas=20F=C3=A4rber?= Replace call of cpu_is_bsp(s->cpu) which really returns !!(s->apicbase & MSR_IA32_APICBASE_BSP) with directly collected value. Due to this the tracepoint trace_cpu_get_apic_base((uint64_t)s->apicbase); will not be hit anymore in apic_reset_common. Signed-off-by: Denis V. Lunev CC: Andreas F=C3=A4rber CC: Paolo Bonzini --- hw/intc/apic_common.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c index 042e960..7a0c7e2 100644 --- a/hw/intc/apic_common.c +++ b/hw/intc/apic_common.c @@ -233,11 +233,10 @@ static void apic_reset_common(DeviceState *dev) { APICCommonState *s =3D APIC_COMMON(dev); APICCommonClass *info =3D APIC_COMMON_GET_CLASS(s); - bool bsp; + uint32_t bsp; =20 - bsp =3D cpu_is_bsp(s->cpu); - s->apicbase =3D APIC_DEFAULT_ADDRESS | - (bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE; + bsp =3D s->apicbase & MSR_IA32_APICBASE_BSP; + s->apicbase =3D APIC_DEFAULT_ADDRESS | bsp | MSR_IA32_APICBASE_ENABL= E; =20 s->vapic_paddr =3D 0; info->vapic_base_update(s); --=20 1.9.1