From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37537) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YfZpP-0001C4-Me for qemu-devel@nongnu.org; Tue, 07 Apr 2015 16:10:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YfZpN-0008M6-KK for qemu-devel@nongnu.org; Tue, 07 Apr 2015 16:10:31 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:33323) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YfZpN-00084l-D5 for qemu-devel@nongnu.org; Tue, 07 Apr 2015 16:10:29 -0400 From: Peter Maydell Date: Tue, 7 Apr 2015 21:09:58 +0100 Message-Id: <1428437400-8474-13-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1428437400-8474-1-git-send-email-peter.maydell@linaro.org> References: <1428437400-8474-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH 12/14] target-arm: Add user-mode transaction attribute List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Crosthwaite , patches@linaro.org, "Edgar E. Iglesias" , Greg Bellows , Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson Add a transaction attribute indicating that a memory access is being done from user-mode (unprivileged). This corresponds to an equivalent signal in ARM AMBA buses. Signed-off-by: Peter Maydell --- include/exec/memattrs.h | 3 +++ target-arm/helper.c | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h index 5df180e..458c0ea 100644 --- a/include/exec/memattrs.h +++ b/include/exec/memattrs.h @@ -27,6 +27,9 @@ typedef uint64_t MemTxAttrs; /* ARM/AMBA TrustZone Secure access */ #define MEMTXATTRS_SECURE (1ULL << 0) +/* Memory access is usermode (unprivileged) */ +#define MEMTXATTRS_USER (1ULL << 1) + /* Bus masters which don't specify any attributes will get this, * which has all attribute bits clear except the topmost one * (so that we can distinguish "all attributes deliberately clear" diff --git a/target-arm/helper.c b/target-arm/helper.c index fdeb2b7..6fca8f8 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -5752,6 +5752,10 @@ static inline int get_phys_addr(CPUARMState *env, target_ulong address, *attrs = 0; } + if (regime_is_user(env, mmu_idx)) { + *attrs |= MEMTXATTRS_USER; + } + /* Fast Context Switch Extension. This doesn't exist at all in v8. * In v7 and earlier it affects all stage 1 translations. */ -- 1.9.1