From: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, patches@apm.com, agraf@suse.de,
christoffer.dall@linaro.org,
Tushar Jagad <tushar.jagad@linaro.org>,
Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
Subject: [Qemu-devel] [v2 1/2] pci: GPEX: Add a function to determine interrupt number for INTx routing
Date: Thu, 30 Apr 2015 17:22:49 +0530 [thread overview]
Message-ID: <1430394771-19617-2-git-send-email-pranavkumar@linaro.org> (raw)
In-Reply-To: <1430394771-19617-1-git-send-email-pranavkumar@linaro.org>
This patch adds a PCI bus specific function pointer "route_intx_to_irq"
for GPEX.
This is used in detemining PCI INTx number from pin.
Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
Signed-off-by: Tushar Jagad <tushar.jagad@linaro.org>
---
hw/pci-host/gpex.c | 12 ++++++++++++
include/hw/pci-host/gpex.h | 1 +
2 files changed, 13 insertions(+)
diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c
index 9d8fb5a..ed96053 100644
--- a/hw/pci-host/gpex.c
+++ b/hw/pci-host/gpex.c
@@ -42,6 +42,17 @@ static void gpex_set_irq(void *opaque, int irq_num, int level)
qemu_set_irq(s->irq[irq_num], level);
}
+static PCIINTxRoute gpex_route_intx_pin_to_irq(void *opaque, int pin)
+{
+ PCIINTxRoute route;
+ GPEXHost *s = opaque;
+
+ route.mode = PCI_INTX_ENABLED;
+ route.irq = (int) s->irq_num[pin];
+
+ return route;
+}
+
static void gpex_host_realize(DeviceState *dev, Error **errp)
{
PCIHostState *pci = PCI_HOST_BRIDGE(dev);
@@ -66,6 +77,7 @@ static void gpex_host_realize(DeviceState *dev, Error **errp)
&s->io_ioport, 0, 4, TYPE_PCIE_BUS);
qdev_set_parent_bus(DEVICE(&s->gpex_root), BUS(pci->bus));
+ pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq);
qdev_init_nofail(DEVICE(&s->gpex_root));
}
diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h
index 68c9348..7df1c16 100644
--- a/include/hw/pci-host/gpex.h
+++ b/include/hw/pci-host/gpex.h
@@ -51,6 +51,7 @@ typedef struct GPEXHost {
MemoryRegion io_ioport;
MemoryRegion io_mmio;
qemu_irq irq[GPEX_NUM_IRQS];
+ uint32_t irq_num[GPEX_NUM_IRQS];
} GPEXHost;
#endif /* HW_GPEX_H */
--
1.9.1
next prev parent reply other threads:[~2015-04-30 11:53 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-30 11:52 [Qemu-devel] [v2 0/2] Generic PCIe host bridge INTx determination for INTx routing Pranavkumar Sawargaonkar
2015-04-30 11:52 ` Pranavkumar Sawargaonkar [this message]
2015-04-30 11:52 ` [Qemu-devel] [v2 2/2] arm: hw: virt: Store information about GPEX legacy interrupt numbers Pranavkumar Sawargaonkar
2015-09-18 16:22 ` [Qemu-devel] [v2 0/2] Generic PCIe host bridge INTx determination for INTx routing Peter Maydell
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