From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38451) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YnszL-0003PU-Sl for qemu-devel@nongnu.org; Thu, 30 Apr 2015 14:15:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YnszG-0001xG-OR for qemu-devel@nongnu.org; Thu, 30 Apr 2015 14:15:07 -0400 Received: from mail-pd0-f179.google.com ([209.85.192.179]:35948) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YnszG-0001wG-Iz for qemu-devel@nongnu.org; Thu, 30 Apr 2015 14:15:02 -0400 Received: by pdea3 with SMTP id a3so68090324pde.3 for ; Thu, 30 Apr 2015 11:15:02 -0700 (PDT) From: Christopher Covington Date: Thu, 30 Apr 2015 14:14:24 -0400 Message-Id: <1430417667-4245-2-git-send-email-christopher.covington@linaro.org> In-Reply-To: <1430417667-4245-1-git-send-email-christopher.covington@linaro.org> References: <1430417667-4245-1-git-send-email-christopher.covington@linaro.org> Subject: [Qemu-devel] [RFC 2/5] arm64: Add PMOVSCLR_EL0 register List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: peter.maydell@linaro.org, qemu-devel@nongnu.org Cc: Christopher Covington The Linux kernel accesses this register early in its setup. Signed-off-by: Christopher Covington --- target-arm/helper.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index 6aeb77c..c9463cb 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -904,6 +904,12 @@ static const ARMCPRegInfo v7_cp_reginfo[] = { .accessfn = pmreg_access, .writefn = pmovsr_write, .raw_writefn = raw_write }, + { .name = "PMOVSCLR_EL0", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 3, .crn = 9, .crm = 12, .opc2 = 3, + .access = PL0_RW, .fieldoffset = offsetof(CPUARMState, cp15.c9_pmovsr), + .accessfn = pmreg_access, + .writefn = pmovsr_write, + .raw_writefn = raw_write }, /* Unimplemented so WI. */ { .name = "PMSWINC", .cp = 15, .crn = 9, .crm = 12, .opc1 = 0, .opc2 = 4, .access = PL0_W, .accessfn = pmreg_access, .type = ARM_CP_NOP }, -- 1.9.1