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From: James Sullivan <sullivan.james.f@gmail.com>
To: qemu-devel@nongnu.org
Cc: pbonzini@redhat.com, James Sullivan <sullivan.james.f@gmail.com>,
	jan.kiszka@siemens.com
Subject: [Qemu-devel] [PATCH v3 3/4] apic: Add helper functions apic_match_dest, apic_match_[physical, logical]_dest
Date: Thu, 30 Apr 2015 15:49:15 -0600	[thread overview]
Message-ID: <1430430556-21869-4-git-send-email-sullivan.james.f@gmail.com> (raw)
In-Reply-To: <1430430556-21869-1-git-send-email-sullivan.james.f@gmail.com>

Added three helper functions apic_match_dest(),
apic_match_physical_dest(), and apic_match_logical_dest() which can be
used to determine if a logical or physical APIC ID match a given LAPIC
under a given dest_mode. This does not account for shorthand.

Signed-off-by: James Sullivan <sullivan.james.f@gmail.com>
---
 hw/intc/apic.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index a25efa1..9dd27b2 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -224,6 +224,32 @@ static int apic_compare_prio(struct APICCommonState *cpu1,
     return apic_get_arb_pri(cpu1) - apic_get_arb_pri(cpu2);
 }
 
+static bool apic_match_physical_dest(struct APICCommonState *apic, uint8_t dest)
+{
+    return (dest == 0xff || apic->id == dest);
+}
+
+static bool apic_match_logical_dest(struct APICCommonState *apic, uint8_t dest)
+{
+    if (apic->dest_mode == 0xf) {
+        return (dest & apic->log_dest) > 0;
+    } else if (apic->dest_mode == 0) {
+        return ((dest & 0xf0) == (apic->log_dest & 0xf0)) &&
+                (dest & apic->log_dest & 0x0f) > 0;
+    }
+    return false;
+}
+
+static bool apic_match_dest(struct APICCommonState *apic, uint8_t dest_mode,
+                     uint8_t dest)
+{
+    if (dest_mode == 0) {
+        return apic_match_physical_dest(apic, dest);
+    } else {
+        return apic_match_logical_dest(apic, dest);
+    }
+}
+
 static void apic_bus_deliver(const uint32_t *deliver_bitmask,
                              uint8_t delivery_mode, uint8_t vector_num,
                              uint8_t trigger_mode)
-- 
2.3.5

  parent reply	other threads:[~2015-04-30 21:52 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-30 21:49 [Qemu-devel] [PATCH v3 0/4] apic: Implement MSI RH bit handling, lowpri IRQ delivery James Sullivan
2015-04-30 21:49 ` [Qemu-devel] [PATCH v3 1/4] apic: Implement LAPIC low priority arbitration functions James Sullivan
2015-04-30 21:49 ` [Qemu-devel] [PATCH v3 2/4] apic: Set and pass in RH bit for MSI interrupts James Sullivan
2015-04-30 21:49 ` James Sullivan [this message]
2015-04-30 21:49 ` [Qemu-devel] [PATCH v3 4/4] apic: Handle RH=1 and lowpri delivery mode in apic_get_delivery_bitmask() James Sullivan

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