From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
Greg Bellows <greg.bellows@linaro.org>,
patches@linaro.org
Subject: [Qemu-devel] [PATCH v4 15/17] hw/arm/virt.c: Wire FIQ between CPU <> GIC
Date: Fri, 1 May 2015 18:50:41 +0100 [thread overview]
Message-ID: <1430502643-25909-16-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1430502643-25909-1-git-send-email-peter.maydell@linaro.org>
From: Greg Bellows <greg.bellows@linaro.org>
Connect FIQ output of the GIC CPU interfaces to the CPUs.
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Message-id: 1429113742-8371-4-git-send-email-greg.bellows@linaro.org
[PMM: minor format tweak]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/virt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 565f573..a7f9a10 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -386,6 +386,8 @@ static uint32_t create_gic(const VirtBoardInfo *vbi, qemu_irq *pic)
qdev_get_gpio_in(gicdev, ppibase + 27));
sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ));
+ sysbus_connect_irq(gicbusdev, i + smp_cpus,
+ qdev_get_gpio_in(cpudev, ARM_CPU_FIQ));
}
for (i = 0; i < NUM_IRQS; i++) {
--
1.9.1
next prev parent reply other threads:[~2015-05-01 17:50 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-01 17:50 [Qemu-devel] [PATCH v4 00/17] arm_gic: Add security and grouping support Peter Maydell
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 01/17] hw/intc/arm_gic: Create outbound FIQ lines Peter Maydell
2015-05-05 0:11 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 02/17] hw/intc/arm_gic: Add Security Extensions property Peter Maydell
2015-05-05 0:19 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 03/17] hw/intc/arm_gic: Switch to read/write callbacks with tx attributes Peter Maydell
2015-05-05 0:31 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 04/17] hw/intc/arm_gic: Add Interrupt Group Registers Peter Maydell
2015-05-05 0:55 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 05/17] hw/intc/arm_gic_kvm.c: Save and restore GICD_IGROUPRn state Peter Maydell
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 06/17] hw/intc/arm_gic: Make ICDDCR/GICD_CTLR banked Peter Maydell
2015-05-05 1:03 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 07/17] hw/intc/arm_gic: Make ICCBPR/GICC_BPR banked Peter Maydell
2015-05-05 1:06 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 08/17] hw/intc/arm_gic: Make ICCICR/GICC_CTLR banked Peter Maydell
2015-05-05 1:12 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 09/17] hw/intc/arm_gic: Implement Non-secure view of RPR Peter Maydell
2015-05-05 1:35 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 10/17] hw/intc/arm_gic: Restrict priority view Peter Maydell
2015-05-05 1:31 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 11/17] hw/intc/arm_gic: Handle grouping for GICC_HPPIR Peter Maydell
2015-05-05 1:43 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 12/17] hw/intc/arm_gic: Change behavior of EOIR writes Peter Maydell
2015-05-05 1:49 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 13/17] hw/intc/arm_gic: Change behavior of IAR writes Peter Maydell
2015-05-05 1:52 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 14/17] hw/intc/arm_gic: Add grouping support to gic_update() Peter Maydell
2015-05-05 1:57 ` Edgar E. Iglesias
2015-05-01 17:50 ` Peter Maydell [this message]
2015-05-05 1:58 ` [Qemu-devel] [PATCH v4 15/17] hw/arm/virt.c: Wire FIQ between CPU <> GIC Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 16/17] hw/arm/vexpress.c: " Peter Maydell
2015-05-05 1:59 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 17/17] hw/arm/highbank.c: " Peter Maydell
2015-05-05 2:08 ` [Qemu-devel] [PATCH v4 00/17] arm_gic: Add security and grouping support Edgar E. Iglesias
2015-05-05 9:21 ` Peter Maydell
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