From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
Greg Bellows <greg.bellows@linaro.org>,
patches@linaro.org
Subject: [Qemu-devel] [PATCH v4 01/17] hw/intc/arm_gic: Create outbound FIQ lines
Date: Fri, 1 May 2015 18:50:27 +0100 [thread overview]
Message-ID: <1430502643-25909-2-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1430502643-25909-1-git-send-email-peter.maydell@linaro.org>
From: Fabian Aggeler <aggelerf@ethz.ch>
Create the outbound FIQ lines from the GIC to the CPUs; these are
used if the GIC has security extensions or grouping support.
Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch>
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Message-id: 1429113742-8371-2-git-send-email-greg.bellows@linaro.org
[PMM: added FIQ lines to kvm-arm-gic so its interface is the same;
tweaked commit message]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/intc/arm_gic.c | 3 +++
hw/intc/arm_gic_kvm.c | 5 ++++-
include/hw/intc/arm_gic_common.h | 1 +
3 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index a04c822..e9fb8b9 100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -790,6 +790,9 @@ void gic_init_irqs_and_distributor(GICState *s)
for (i = 0; i < NUM_CPU(s); i++) {
sysbus_init_irq(sbd, &s->parent_irq[i]);
}
+ for (i = 0; i < NUM_CPU(s); i++) {
+ sysbus_init_irq(sbd, &s->parent_fiq[i]);
+ }
memory_region_init_io(&s->iomem, OBJECT(s), &gic_dist_ops, s,
"gic_dist", 0x1000);
}
diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c
index e1952ad..5aedae1 100644
--- a/hw/intc/arm_gic_kvm.c
+++ b/hw/intc/arm_gic_kvm.c
@@ -554,12 +554,15 @@ static void kvm_arm_gic_realize(DeviceState *dev, Error **errp)
*/
i += (GIC_INTERNAL * s->num_cpu);
qdev_init_gpio_in(dev, kvm_arm_gic_set_irq, i);
- /* We never use our outbound IRQ lines but provide them so that
+ /* We never use our outbound IRQ/FIQ lines but provide them so that
* we maintain the same interface as the non-KVM GIC.
*/
for (i = 0; i < s->num_cpu; i++) {
sysbus_init_irq(sbd, &s->parent_irq[i]);
}
+ for (i = 0; i < s->num_cpu; i++) {
+ sysbus_init_irq(sbd, &s->parent_fiq[i]);
+ }
/* Try to create the device via the device control API */
s->dev_fd = -1;
diff --git a/include/hw/intc/arm_gic_common.h b/include/hw/intc/arm_gic_common.h
index f6887ed..01c6f24 100644
--- a/include/hw/intc/arm_gic_common.h
+++ b/include/hw/intc/arm_gic_common.h
@@ -50,6 +50,7 @@ typedef struct GICState {
/*< public >*/
qemu_irq parent_irq[GIC_NCPU];
+ qemu_irq parent_fiq[GIC_NCPU];
bool enabled;
bool cpu_enabled[GIC_NCPU];
--
1.9.1
next prev parent reply other threads:[~2015-05-01 17:50 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-01 17:50 [Qemu-devel] [PATCH v4 00/17] arm_gic: Add security and grouping support Peter Maydell
2015-05-01 17:50 ` Peter Maydell [this message]
2015-05-05 0:11 ` [Qemu-devel] [PATCH v4 01/17] hw/intc/arm_gic: Create outbound FIQ lines Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 02/17] hw/intc/arm_gic: Add Security Extensions property Peter Maydell
2015-05-05 0:19 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 03/17] hw/intc/arm_gic: Switch to read/write callbacks with tx attributes Peter Maydell
2015-05-05 0:31 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 04/17] hw/intc/arm_gic: Add Interrupt Group Registers Peter Maydell
2015-05-05 0:55 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 05/17] hw/intc/arm_gic_kvm.c: Save and restore GICD_IGROUPRn state Peter Maydell
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 06/17] hw/intc/arm_gic: Make ICDDCR/GICD_CTLR banked Peter Maydell
2015-05-05 1:03 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 07/17] hw/intc/arm_gic: Make ICCBPR/GICC_BPR banked Peter Maydell
2015-05-05 1:06 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 08/17] hw/intc/arm_gic: Make ICCICR/GICC_CTLR banked Peter Maydell
2015-05-05 1:12 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 09/17] hw/intc/arm_gic: Implement Non-secure view of RPR Peter Maydell
2015-05-05 1:35 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 10/17] hw/intc/arm_gic: Restrict priority view Peter Maydell
2015-05-05 1:31 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 11/17] hw/intc/arm_gic: Handle grouping for GICC_HPPIR Peter Maydell
2015-05-05 1:43 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 12/17] hw/intc/arm_gic: Change behavior of EOIR writes Peter Maydell
2015-05-05 1:49 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 13/17] hw/intc/arm_gic: Change behavior of IAR writes Peter Maydell
2015-05-05 1:52 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 14/17] hw/intc/arm_gic: Add grouping support to gic_update() Peter Maydell
2015-05-05 1:57 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 15/17] hw/arm/virt.c: Wire FIQ between CPU <> GIC Peter Maydell
2015-05-05 1:58 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 16/17] hw/arm/vexpress.c: " Peter Maydell
2015-05-05 1:59 ` Edgar E. Iglesias
2015-05-01 17:50 ` [Qemu-devel] [PATCH v4 17/17] hw/arm/highbank.c: " Peter Maydell
2015-05-05 2:08 ` [Qemu-devel] [PATCH v4 00/17] arm_gic: Add security and grouping support Edgar E. Iglesias
2015-05-05 9:21 ` Peter Maydell
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