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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 00/19] target-arm queue
Date: Mon, 11 May 2015 14:40:19 +0100	[thread overview]
Message-ID: <1431351638-21705-1-git-send-email-peter.maydell@linaro.org> (raw)

This is mostly the GIC TZ changes, with a couple of other
minor bugfixes.

-- PMM

The following changes since commit b951cda21d6b232f138ccf008e12bce8ddc95465:

  Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging (2015-05-11 12:01:09 +0100)

are available in the git repository at:


  git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20150511

for you to fetch changes up to 49855cdaed78f66f501df6e18b8b3b7012cea2eb:

  hw/arm/highbank.c: Wire FIQ between CPU <> GIC (2015-05-11 14:28:54 +0100)

----------------------------------------------------------------
target-arm queue:
 * Support TZ and grouping in the GIC
 * hw/sd: sd_reset cleanup
 * armv7m_nvic: fix bug in systick device

----------------------------------------------------------------
Adrian Huang (1):
      armv7m_nvic: systick: Reload the RELOAD value and count down only if ENABLE bit is set

Fabian Aggeler (12):
      hw/intc/arm_gic: Create outbound FIQ lines
      hw/intc/arm_gic: Add Security Extensions property
      hw/intc/arm_gic: Add Interrupt Group Registers
      hw/intc/arm_gic: Make ICDDCR/GICD_CTLR banked
      hw/intc/arm_gic: Make ICCBPR/GICC_BPR banked
      hw/intc/arm_gic: Make ICCICR/GICC_CTLR banked
      hw/intc/arm_gic: Implement Non-secure view of RPR
      hw/intc/arm_gic: Restrict priority view
      hw/intc/arm_gic: Handle grouping for GICC_HPPIR
      hw/intc/arm_gic: Change behavior of EOIR writes
      hw/intc/arm_gic: Change behavior of IAR writes
      hw/arm/vexpress.c: Wire FIQ between CPU <> GIC

Greg Bellows (1):
      hw/arm/virt.c: Wire FIQ between CPU <> GIC

Peter Maydell (5):
      hw/sd: Don't pass BlockBackend to sd_reset()
      hw/intc/arm_gic: Switch to read/write callbacks with tx attributes
      hw/intc/arm_gic_kvm.c: Save and restore GICD_IGROUPRn state
      hw/intc/arm_gic: Add grouping support to gic_update()
      hw/arm/highbank.c: Wire FIQ between CPU <> GIC

 hw/arm/highbank.c                |   3 +
 hw/arm/vexpress.c                |   2 +
 hw/arm/virt.c                    |   2 +
 hw/intc/arm_gic.c                | 469 ++++++++++++++++++++++++++++++++-------
 hw/intc/arm_gic_common.c         |  22 +-
 hw/intc/arm_gic_kvm.c            |  51 +++--
 hw/intc/armv7m_nvic.c            |  17 +-
 hw/intc/gic_internal.h           |  29 ++-
 hw/sd/sd.c                       |  17 +-
 include/hw/intc/arm_gic_common.h |  24 +-
 10 files changed, 509 insertions(+), 127 deletions(-)

             reply	other threads:[~2015-05-11 13:40 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-11 13:40 Peter Maydell [this message]
2015-05-11 13:40 ` [Qemu-devel] [PULL 01/19] armv7m_nvic: systick: Reload the RELOAD value and count down only if ENABLE bit is set Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 02/19] hw/sd: Don't pass BlockBackend to sd_reset() Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 03/19] hw/intc/arm_gic: Create outbound FIQ lines Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 04/19] hw/intc/arm_gic: Add Security Extensions property Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 05/19] hw/intc/arm_gic: Switch to read/write callbacks with tx attributes Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 06/19] hw/intc/arm_gic: Add Interrupt Group Registers Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 07/19] hw/intc/arm_gic_kvm.c: Save and restore GICD_IGROUPRn state Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 08/19] hw/intc/arm_gic: Make ICDDCR/GICD_CTLR banked Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 09/19] hw/intc/arm_gic: Make ICCBPR/GICC_BPR banked Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 10/19] hw/intc/arm_gic: Make ICCICR/GICC_CTLR banked Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 11/19] hw/intc/arm_gic: Implement Non-secure view of RPR Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 12/19] hw/intc/arm_gic: Restrict priority view Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 13/19] hw/intc/arm_gic: Handle grouping for GICC_HPPIR Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 14/19] hw/intc/arm_gic: Change behavior of EOIR writes Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 15/19] hw/intc/arm_gic: Change behavior of IAR writes Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 16/19] hw/intc/arm_gic: Add grouping support to gic_update() Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 17/19] hw/arm/virt.c: Wire FIQ between CPU <> GIC Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 18/19] hw/arm/vexpress.c: " Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 19/19] hw/arm/highbank.c: " Peter Maydell
2015-05-12  8:01 ` [Qemu-devel] [PULL 00/19] target-arm queue Peter Maydell
2015-05-12  8:10   ` Peter Crosthwaite
2015-05-12  8:22     ` Peter Maydell
  -- strict thread matches above, loose matches on Subject: below --
2018-10-16 15:23 Peter Maydell
2018-04-26 10:46 Peter Maydell
2018-04-26 12:15 ` Peter Maydell
2015-05-12 11:03 Peter Maydell
2015-05-12 13:12 ` Peter Maydell
2014-09-29 18:26 Peter Maydell
2014-09-30 10:52 ` Peter Maydell
2014-08-19 18:09 Peter Maydell
2014-08-20  9:49 ` Peter Maydell
2014-06-09 15:10 Peter Maydell
2014-06-09 16:38 ` Peter Maydell

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