qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 19/19] hw/arm/highbank.c: Wire FIQ between CPU <> GIC
Date: Mon, 11 May 2015 14:40:38 +0100	[thread overview]
Message-ID: <1431351638-21705-20-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1431351638-21705-1-git-send-email-peter.maydell@linaro.org>

Connect FIQ output of the GIC CPU interfaces to the CPUs.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1430502643-25909-18-git-send-email-peter.maydell@linaro.org
---
 hw/arm/highbank.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
index b2d048b..f8353a7 100644
--- a/hw/arm/highbank.c
+++ b/hw/arm/highbank.c
@@ -217,6 +217,7 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id)
     qemu_irq pic[128];
     int n;
     qemu_irq cpu_irq[4];
+    qemu_irq cpu_fiq[4];
     MemoryRegion *sysram;
     MemoryRegion *dram;
     MemoryRegion *sysmem;
@@ -269,6 +270,7 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id)
             exit(1);
         }
         cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ);
+        cpu_fiq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_FIQ);
     }
 
     sysmem = get_system_memory();
@@ -313,6 +315,7 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id)
     sysbus_mmio_map(busdev, 0, MPCORE_PERIPHBASE);
     for (n = 0; n < smp_cpus; n++) {
         sysbus_connect_irq(busdev, n, cpu_irq[n]);
+        sysbus_connect_irq(busdev, n + smp_cpus, cpu_fiq[n]);
     }
 
     for (n = 0; n < 128; n++) {
-- 
1.9.1

  parent reply	other threads:[~2015-05-11 13:40 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-11 13:40 [Qemu-devel] [PULL 00/19] target-arm queue Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 01/19] armv7m_nvic: systick: Reload the RELOAD value and count down only if ENABLE bit is set Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 02/19] hw/sd: Don't pass BlockBackend to sd_reset() Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 03/19] hw/intc/arm_gic: Create outbound FIQ lines Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 04/19] hw/intc/arm_gic: Add Security Extensions property Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 05/19] hw/intc/arm_gic: Switch to read/write callbacks with tx attributes Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 06/19] hw/intc/arm_gic: Add Interrupt Group Registers Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 07/19] hw/intc/arm_gic_kvm.c: Save and restore GICD_IGROUPRn state Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 08/19] hw/intc/arm_gic: Make ICDDCR/GICD_CTLR banked Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 09/19] hw/intc/arm_gic: Make ICCBPR/GICC_BPR banked Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 10/19] hw/intc/arm_gic: Make ICCICR/GICC_CTLR banked Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 11/19] hw/intc/arm_gic: Implement Non-secure view of RPR Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 12/19] hw/intc/arm_gic: Restrict priority view Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 13/19] hw/intc/arm_gic: Handle grouping for GICC_HPPIR Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 14/19] hw/intc/arm_gic: Change behavior of EOIR writes Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 15/19] hw/intc/arm_gic: Change behavior of IAR writes Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 16/19] hw/intc/arm_gic: Add grouping support to gic_update() Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 17/19] hw/arm/virt.c: Wire FIQ between CPU <> GIC Peter Maydell
2015-05-11 13:40 ` [Qemu-devel] [PULL 18/19] hw/arm/vexpress.c: " Peter Maydell
2015-05-11 13:40 ` Peter Maydell [this message]
2015-05-12  8:01 ` [Qemu-devel] [PULL 00/19] target-arm queue Peter Maydell
2015-05-12  8:10   ` Peter Crosthwaite
2015-05-12  8:22     ` Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1431351638-21705-20-git-send-email-peter.maydell@linaro.org \
    --to=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).