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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH v2 09/17] target-alpha: Fix cvttq vs large integers
Date: Tue, 12 May 2015 10:39:39 -0700	[thread overview]
Message-ID: <1431452387-20280-10-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1431452387-20280-1-git-send-email-rth@twiddle.net>

The range +- 2**63 - 2**64 was returning the wrong truncated
result.  We also incorrectly signaled overflow for -2**63.

Reported-by: Al Viro <viro@ZenIV.linux.org.uk>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-alpha/fpu_helper.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/target-alpha/fpu_helper.c b/target-alpha/fpu_helper.c
index 132b5a2..9449c57 100644
--- a/target-alpha/fpu_helper.c
+++ b/target-alpha/fpu_helper.c
@@ -453,12 +453,12 @@ static uint64_t do_cvttq(CPUAlphaState *env, uint64_t a, int roundmode)
         if (shift >= 0) {
             /* In this case the number is so large that we must shift
                the fraction left.  There is no rounding to do.  */
-            exc = FPCR_IOV | FPCR_INE;
-            if (shift < 63) {
+            if (shift < 64) {
                 ret = frac << shift;
-                if ((ret >> shift) == frac) {
-                    exc = 0;
-                }
+            }
+            /* Check for overflow.  Note the special case of -0x1p63.  */
+            if (shift >= 11 && a != 0xC3E0000000000000ull) {
+                exc = FPCR_IOV | FPCR_INE;
             }
         } else {
             uint64_t round;
-- 
2.1.0

  parent reply	other threads:[~2015-05-12 17:40 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-12 17:39 [Qemu-devel] [PATCH v2 00/17] target-alpha fpu improvments Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 01/17] target-alpha: Move VAX helpers to a new file Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 02/17] target-alpha: Rename floating-point subroutines Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 03/17] target-alpha: Forget installed round mode after MT_FPCR Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 04/17] target-alpha: Set PC correctly for floating-point exceptions Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 05/17] target-alpha: Tidy FPCR representation Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 06/17] target-alpha: Set fpcr_exc_status even for disabled exceptions Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 07/17] target-alpha: Set EXC_M_SWC for exceptions from /S insns Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 08/17] target-alpha: Raise IOV from CVTTQ Richard Henderson
2015-05-12 17:39 ` Richard Henderson [this message]
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 10/17] target-alpha: Fix cvttq vs inf Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 11/17] target-alpha: Fix integer overflow checking insns Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 12/17] target-alpha: Implement WH64EN Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 13/17] target-alpha: Disallow literal operand to 1C.30 to 1C.37 Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 14/17] target-alpha: Raise EXC_M_INV properly for fp inputs Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 15/17] target-alpha: Suppress underflow from CVTTQ if DNZ Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 16/17] target-alpha: Raise IOV from CVTQL Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 17/17] target-alpha: Rewrite helper_zapnot Richard Henderson

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