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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH v2 13/17] target-alpha: Disallow literal operand to 1C.30 to 1C.37
Date: Tue, 12 May 2015 10:39:43 -0700	[thread overview]
Message-ID: <1431452387-20280-14-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1431452387-20280-1-git-send-email-rth@twiddle.net>

Before 64f45e49 we used to have literal checks for 4 of these 8 opcodes.
Confirmed that real hardware doesn't allow them.

Reported-by: Al Viro <viro@ZenIV.linux.org.uk>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-alpha/translate.c | 19 +++++++++++++++++--
 1 file changed, 17 insertions(+), 2 deletions(-)

diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 953d1ef..f0556b0 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -1342,6 +1342,13 @@ static ExitStatus gen_mtpr(DisasContext *ctx, TCGv vb, int regno)
 }
 #endif /* !USER_ONLY*/
 
+#define REQUIRE_NO_LIT                          \
+    do {                                        \
+        if (real_islit) {                       \
+            goto invalid_opc;                   \
+        }                                       \
+    } while (0)
+
 #define REQUIRE_TB_FLAG(FLAG)                   \
     do {                                        \
         if ((ctx->tb->flags & (FLAG)) == 0) {   \
@@ -1361,7 +1368,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
     int32_t disp21, disp16, disp12 __attribute__((unused));
     uint16_t fn11;
     uint8_t opc, ra, rb, rc, fpfn, fn7, lit;
-    bool islit;
+    bool islit, real_islit;
     TCGv va, vb, vc, tmp, tmp2;
     TCGv_i32 t32;
     ExitStatus ret;
@@ -1371,7 +1378,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
     ra = extract32(insn, 21, 5);
     rb = extract32(insn, 16, 5);
     rc = extract32(insn, 0, 5);
-    islit = extract32(insn, 12, 1);
+    real_islit = islit = extract32(insn, 12, 1);
     lit = extract32(insn, 13, 8);
 
     disp21 = sextract32(insn, 0, 21);
@@ -2466,11 +2473,13 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
             /* CTPOP */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_CIX);
             REQUIRE_REG_31(ra);
+            REQUIRE_NO_LIT;
             gen_helper_ctpop(vc, vb);
             break;
         case 0x31:
             /* PERR */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_MVI);
+            REQUIRE_NO_LIT;
             va = load_gpr(ctx, ra);
             gen_helper_perr(vc, va, vb);
             break;
@@ -2478,36 +2487,42 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
             /* CTLZ */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_CIX);
             REQUIRE_REG_31(ra);
+            REQUIRE_NO_LIT;
             gen_helper_ctlz(vc, vb);
             break;
         case 0x33:
             /* CTTZ */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_CIX);
             REQUIRE_REG_31(ra);
+            REQUIRE_NO_LIT;
             gen_helper_cttz(vc, vb);
             break;
         case 0x34:
             /* UNPKBW */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_MVI);
             REQUIRE_REG_31(ra);
+            REQUIRE_NO_LIT;
             gen_helper_unpkbw(vc, vb);
             break;
         case 0x35:
             /* UNPKBL */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_MVI);
             REQUIRE_REG_31(ra);
+            REQUIRE_NO_LIT;
             gen_helper_unpkbl(vc, vb);
             break;
         case 0x36:
             /* PKWB */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_MVI);
             REQUIRE_REG_31(ra);
+            REQUIRE_NO_LIT;
             gen_helper_pkwb(vc, vb);
             break;
         case 0x37:
             /* PKLB */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_MVI);
             REQUIRE_REG_31(ra);
+            REQUIRE_NO_LIT;
             gen_helper_pklb(vc, vb);
             break;
         case 0x38:
-- 
2.1.0

  parent reply	other threads:[~2015-05-12 17:40 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-12 17:39 [Qemu-devel] [PATCH v2 00/17] target-alpha fpu improvments Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 01/17] target-alpha: Move VAX helpers to a new file Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 02/17] target-alpha: Rename floating-point subroutines Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 03/17] target-alpha: Forget installed round mode after MT_FPCR Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 04/17] target-alpha: Set PC correctly for floating-point exceptions Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 05/17] target-alpha: Tidy FPCR representation Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 06/17] target-alpha: Set fpcr_exc_status even for disabled exceptions Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 07/17] target-alpha: Set EXC_M_SWC for exceptions from /S insns Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 08/17] target-alpha: Raise IOV from CVTTQ Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 09/17] target-alpha: Fix cvttq vs large integers Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 10/17] target-alpha: Fix cvttq vs inf Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 11/17] target-alpha: Fix integer overflow checking insns Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 12/17] target-alpha: Implement WH64EN Richard Henderson
2015-05-12 17:39 ` Richard Henderson [this message]
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 14/17] target-alpha: Raise EXC_M_INV properly for fp inputs Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 15/17] target-alpha: Suppress underflow from CVTTQ if DNZ Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 16/17] target-alpha: Raise IOV from CVTQL Richard Henderson
2015-05-12 17:39 ` [Qemu-devel] [PATCH v2 17/17] target-alpha: Rewrite helper_zapnot Richard Henderson

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