From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60122) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YsIFT-00021V-Qb for qemu-devel@nongnu.org; Tue, 12 May 2015 18:02:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YsIFQ-0005Ae-Kv for qemu-devel@nongnu.org; Tue, 12 May 2015 18:01:59 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:13035) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YsIFQ-00059v-FS for qemu-devel@nongnu.org; Tue, 12 May 2015 18:01:56 -0400 From: Leon Alrae Date: Tue, 12 May 2015 23:01:37 +0100 Message-ID: <1431468101-5419-2-git-send-email-leon.alrae@imgtec.com> In-Reply-To: <1431468101-5419-1-git-send-email-leon.alrae@imgtec.com> References: <1431468101-5419-1-git-send-email-leon.alrae@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain Subject: [Qemu-devel] [PATCH v2 1/5] include/softmmu-semi.h: Make semihosting support 64-bit clean List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: "Maciej W. Rozycki" , matthew.fortune@imgtec.com, aurelien@aurel32.net From: "Maciej W. Rozycki" Correct addresses passed around in semihosting to use a data type suitable for both 32-bit and 64-bit targets. Signed-off-by: Maciej W. Rozycki Signed-off-by: Leon Alrae --- include/exec/softmmu-semi.h | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/include/exec/softmmu-semi.h b/include/exec/softmmu-semi.h index 8401f7d..1819cc2 100644 --- a/include/exec/softmmu-semi.h +++ b/include/exec/softmmu-semi.h @@ -9,14 +9,14 @@ #ifndef SOFTMMU_SEMI_H #define SOFTMMU_SEMI_H 1 -static inline uint32_t softmmu_tget32(CPUArchState *env, uint32_t addr) +static inline uint32_t softmmu_tget32(CPUArchState *env, target_ulong addr) { uint32_t val; cpu_memory_rw_debug(ENV_GET_CPU(env), addr, (uint8_t *)&val, 4, 0); return tswap32(val); } -static inline uint32_t softmmu_tget8(CPUArchState *env, uint32_t addr) +static inline uint32_t softmmu_tget8(CPUArchState *env, target_ulong addr) { uint8_t val; @@ -28,7 +28,8 @@ static inline uint32_t softmmu_tget8(CPUArchState *env, uint32_t addr) #define get_user_u8(arg, p) ({ arg = softmmu_tget8(env, p) ; 0; }) #define get_user_ual(arg, p) get_user_u32(arg, p) -static inline void softmmu_tput32(CPUArchState *env, uint32_t addr, uint32_t val) +static inline void softmmu_tput32(CPUArchState *env, + target_ulong addr, uint32_t val) { val = tswap32(val); cpu_memory_rw_debug(ENV_GET_CPU(env), addr, (uint8_t *)&val, 4, 1); @@ -36,8 +37,8 @@ static inline void softmmu_tput32(CPUArchState *env, uint32_t addr, uint32_t val #define put_user_u32(arg, p) ({ softmmu_tput32(env, p, arg) ; 0; }) #define put_user_ual(arg, p) put_user_u32(arg, p) -static void *softmmu_lock_user(CPUArchState *env, uint32_t addr, uint32_t len, - int copy) +static void *softmmu_lock_user(CPUArchState *env, + target_ulong addr, target_ulong len, int copy) { uint8_t *p; /* TODO: Make this something that isn't fixed size. */ @@ -48,7 +49,7 @@ static void *softmmu_lock_user(CPUArchState *env, uint32_t addr, uint32_t len, return p; } #define lock_user(type, p, len, copy) softmmu_lock_user(env, p, len, copy) -static char *softmmu_lock_user_string(CPUArchState *env, uint32_t addr) +static char *softmmu_lock_user_string(CPUArchState *env, target_ulong addr) { char *p; char *s;